Commit Graph

19 Commits

Author SHA1 Message Date
jhb
5a3bc2892e Tweak the ELCR support slightly. Explicitly probe the ELCR during boot
instead of burying that in the atpic(4) code as atpic(4) is not the only
user of elcr(4).  Change the elcr(4) code to export a global elcr_found
variable that other code can check to see if a valid ELCR was found.

MFC after:	1 month
2005-01-18 20:24:47 +00:00
scottl
fb7f90d7ec Optimize intr_execute_handlers() by combining the pic_disable_source() and
pic_eoi_source() into one call.  This halves the number of spinlock operations
and indirect function calls in the normal case of handling a normal (ithread)
interrupt.  Optimize the atpic and ioapic drivers to use inlines where
appropriate in supporting the intr_execute_handlers() change.

This knocks 900ns, or roughly 1350 cycles, off of the time spent servicing an
interrupt in the common case on my 1.5GHz P4 uniprocessor system.  SMP systems
likely won't see as much of a gain due to the ioapic being more efficient than
the atpic.  I'll investigate porting this to amd64 soon.

Reviewed by:	jhb
2004-08-02 15:31:10 +00:00
phk
d6f7d2bde6 Add some missing <sys/module.h> includes which are masked by the
one on death-row in <sys/kernel.h>
2004-05-30 17:57:46 +00:00
jhb
052c3f46af - Move some macros from icu.h into atpic.c as that is the only place they
are used.
- Reduce duplication of a couple of macros removing the duplicates from
  ich.h.
- Remove unused macros from icu.h as well as locore protection as this
  header is no longer included in assembly sources.
2004-05-11 20:23:24 +00:00
jhb
da67f4fe48 - Simplify the sizeof expression in the CTASSERT() for NUM_ISA_IRQS.
- Fixup grammar in a comment.

Submitted by:	bde (1)
2004-05-10 18:33:52 +00:00
nyan
e93748992b Fixed PC98 support.
- Disable an ELCR on PC98.
 - Correct IRQs.
2004-05-06 13:48:34 +00:00
jhb
415131cd6d - Add a new pic method pic_config_intr() to set the trigger mode and
polarity for a specified IRQ.  The intr_config_intr() function wraps
  this pic method hiding the IRQ to interrupt source lookup.
- Add a config_intr() method to the atpic(4) driver that reconfigures
  the interrupt using the ELCR if possible and returns an error otherwise.
- Add a config_intr() method to the apic(4) driver that just logs any
  requests that would change the existing programming under bootverbose.
  Currently, the only changes the apic(4) driver receives are due to bugs
  in the acpi(4) driver and its handling of link devices, hence the reason
  for such requests currently being ignored.
- Have the nexus(4) driver on i386 implement the bus_config_intr() function
  by calling intr_config_intr().
2004-05-04 21:02:56 +00:00
jhb
4bc7c8e398 - Add a member to the atpic interrupt source structures to indicate if the
IRQ is edge triggered or level triggered.  For ISA interrupts, we assume
  that edge triggered interrupts are always active high and that level
  triggered interrupts are always active low.
- Don't disable an edge triggered interrupt in the PIC.  This avoids
  outb instructions to the actual PIC for traditional ISA IRQs such as
  IRQ 1, 6, 14, and 15.  (Fast interrupts such as IRQs 0 and 8 don't mask
  their source, so this doesn't change anything for them.)
- For MCA systems we assume that all interrupts are level triggered and
  thus need masking.  Otherwise, we probe the ELCR.  If it exists we trust
  what it tells us regarding which interrupts are level triggered.  If it
  does not exist, we assume that IRQs 0, 1, 2, and 8 are edge triggered
  and that all other IRQs are level triggered and need masking.
- Instruct the ELCR mini-driver to restore its saved state during resume.
2004-05-04 20:12:52 +00:00
jhb
7ea4fab234 - Add an IMEN_MASK macro that returns the 8-bit bitmask of an atpic
interrupt source.
- Only do an outb() to the PIC to clear a bit in imen if the bit is set.
- Add a NUM_ISA_IRQS macro to replace uglier
  'sizeof(array) / sizeof(member)' expressions along with a CTASSERT() to
  ensure that the macro is correct.
2004-05-03 14:52:41 +00:00
obrien
6e5a424e76 Use BSD spelling vs. SysV. 2004-04-19 18:38:04 +00:00
njl
05a1f56fc9 Convert callers to the new bus_alloc_resource_any(9) API.
Submitted by:	Mark Santcroos <marks@ripe.net>
Reviewed by:	imp, dfr, bde
2004-03-17 17:50:55 +00:00
jhb
bd0c4d216c - Use i8259A register defines from shared sys/dev/ic/i8259.h rather than
from the i386-specific icu.h.
- Replace PC98 magic numbers with equivalent register define values along
  with comments about PC-98 "quirks".
2004-01-06 19:07:08 +00:00
jhb
e9c1e3387f Add a special check for a stray IRQ 7 or IRQ 15 to see if it is actually
a spurious interrupt from one of the 8259As.  If so, don't log it as a
stray IRQ, but just silently ignore it.

Approved by:	re (rwatson)
2003-11-19 15:40:23 +00:00
jhb
1e7f54677c - Add counts to the ATPIC interrupt sources and point the ATPIC interrupt
source count pointers at them so that intr_execute_handlers() won't
  choke when it tries to handle an unregisterd ATPIC interrupt source.
- Install the low-level ATPIC interrupt handlers when we first program the
  ATPIC in atpic_startup() rather than at SI_SUB_INTR.  This is only
  necessary to work around buggy code that enables interrupts too early
  in the boot process (namely, the vm86 code).

Approved by:	re (rwatson)
2003-11-19 15:38:56 +00:00
jhb
5d2ca74893 Always install IDT entries for ATPIC interrupt sources. The APIC no
longer uses these interrupt vectors for its ISA interrupt pins, so these
entries will not be overwritten.  If we get a spurious interrupt from the
ATPIC when using the APIC, it will be treated as a stray interrupt instead
of causing a panic.
2003-11-14 21:02:49 +00:00
jhb
398b81cbfe Replace magic numbers with macros for i8259A register constants. Still
need the ICW4 bits for PC98 though.
2003-11-14 19:13:06 +00:00
jhb
9428d57b9b - Move manipulation of td_intr_nesting_level out of assembly interrupt
vector stubs and into the C functions they call.
- Move disabling and EOIing of interrupt sources out of PIC driver entry
  points and into intr_execute_handlers().  Intr_execute_handlers() only
  disables a source for an interrupt if it is a stray interrupt or has
  threaded handlers.  Sources with fast handlers no longer disable (mask)
  the source while executing the handlers.
- Move the setting of clkintr_pending into intr_execute_handlers() and set
  the variable for any interrupt source with a vector of 0.  (Should only
  be true for IRQ 0.)  This fixes clkintr_pending in the NO_MIXED_MODE
  case.
- Implement lapic_eoi() and use it to implement ioapic_eoi_source().
- Rename atpic_sched_ithd() to atpic_handle_intr() since it is used to
  handle all atpic interrupts and not just threaded ones.

Inspired by:	peter's changes to amd64 in p4 (1)
Requested by:	bde (2)
2003-11-12 18:13:57 +00:00
nyan
9a0462c2a3 Fix to support pc98. 2003-11-04 13:13:04 +00:00
jhb
aac4b7181c Add the new atpic(4) driver for the 8259A master and slave PICs. By
default we provide 16 interrupt sources for IRQs 0 through 15.  However,
if the I/O APIC driver has already registered sources for any of those IRQs
then we will silently fail to register our own source for that IRQ.

Note that i386/isa/icu.h is now specific to the 8259A and no longer
contains any info relevant to APICs.  Also note that fast interrupts no
longer use a separate entry point.  Instead, both fast and threaded
interrupts share the same entry point which merely looks up the appropriate
source and passes control to intr_execute_handlers().
2003-11-03 21:34:45 +00:00