1727 Commits

Author SHA1 Message Date
jhb
8d5360c01e MFC: Handle CPUs with APIC IDs higher than 32. 2007-10-05 15:22:37 +00:00
des
1784c5897c MFC: whitespace changes from HEAD 2007-09-28 08:43:54 +00:00
des
8581c17a99 MFC: synch with HEAD, minus whitespace changes. 2007-09-28 08:42:04 +00:00
jhb
ce3ef5f34e MFC: Partial MFC of earlier minor fixes and tweaks to x86 interrupt code:
- Add a new nexus hook: nexus_add_irq() to ask the nexus driver to add an
  IRQ to its irq_rman.  The MSI code uses this when it creates new
  interrupt sources to let the nexus know about newly valid IRQs.
  Previously the msi_alloc() and msix_alloc() passed some extra stuff
  back to the nexus methods which then added the IRQs.  This approach is
  a bit cleaner.
- Change the MSI sx lock to a mutex.  If we need to create new sources,
  drop the lock, create the required number of sources, then get the lock
  and try the allocation again.
2007-08-15 21:12:08 +00:00
jhb
24a23340cc MFC: Revamp the MSI/MSI-X code a bit to achieve two main goals:
- Simplify the amount of work that has be done for each architecture by
  pushing more of the truly MI code down into the PCI bus driver.
- Don't bind MSI-X indicies to IRQs so that we can allow a driver to map
  multiple MSI-X messages into a single IRQ when handling a message
  shortage.

Note that as with the previous MSI MFC, this does not yet include the
'pci_remap_msix()' function.
2007-08-15 20:56:10 +00:00
jhb
2a667e66b3 Don't abuse tf_err to pass the faulting virtual address to signal handlers
on i386.  Instead, add a new field to 'struct mdthread' to hold the address
and preserve the tf_err value.  This corrects the 'sc_err' value in signal
frames which wine needs.

Tested by:	wine-freebsd @ hub org
2007-08-14 15:46:35 +00:00
jhb
83beae72fc MFC: Initial PAT support including the following:
- New pmap_mapdev_attr() function for amd64 and i386.
- pmap_mapdev() on i386 and amd64 uses UC now rather than WB.
- New pmap_mapbios()/pmap_unmapbios() functions to map firmware tables.
- New pmap_change_attr() function for amd64 and i386.
- Bump __FreeBSD_version.
2007-05-02 18:42:47 +00:00
jhb
6950f85892 MFC: Add various constants for the PAT MSR and the PAT PTE and PDE flags
and initialize the PAT MSR during boot.
2007-05-02 16:16:57 +00:00
jhb
c39819f05f MFC: Add 'pmap_invalidate_cache()'. 2007-05-02 15:40:15 +00:00
jhb
80b8da4bdb MFC: PCI MSI support for amd64 and i386. 2007-03-31 15:23:21 +00:00
jhb
862b62f2a8 MFC: Change the x86 interrupt code to suspend/resume interrupt controllers
(PICs) rather than interrupt sources.  As a result, always reset the 8259As
on resume and reset the local APIC of the BSP on resume.

Approved by:	re (hrs)
2006-10-30 18:03:04 +00:00
jhb
4ba6a58710 MFC: Fix sign bug in #ifdef for value of INTRCNT_COUNT.
Approved by:	re (hrs)
2006-10-19 14:52:03 +00:00
twinterg
3ce9cac735 MFC:
Extend i4b to support CAPI manager based ISDN controllers (CAPI manager is
part of c4b, CAPI for BSD). This may be a preparation to add CAPI for BSD to
the source tree, in case the decision to MFC c4b itself is positive. Until
then users of c4b at least do not need to build a new kernel or base system
to compile and run c4b.

Approved by:	hm (mentor)
2006-08-06 19:03:27 +00:00
peter
ed8d7d136b MFC: Bring kernel side of minidumps to 6.x on i386 and amd64.
Note: these are defaulting to off for the moment.  Use
'sysctl debug.minidump=1' to enable them.  These should be turned on
relatively soon though.

Reminded by:  emaste
2006-07-24 23:28:09 +00:00
mr
f1ffb20b12 MFC VIA C7 support.
Obtained from:	mostly OpenBSD
2006-07-21 15:12:03 +00:00
davidxu
b0faec3bf7 MFC: Clear invalid bits in SSE mxcsr register. 2006-07-01 00:57:56 +00:00
jkim
7735df0379 MFC: Multicore detection.
- Print number of physical/logical cores and more CPUID info.
- Add newer CPUID definitions for future use.
- Correct few MSR addresses while I am here.
- Fix spelling mistake.

Approved by:	re (hrs)
2006-04-24 18:24:31 +00:00
cvs2svn
66eae910d9 This commit was manufactured by cvs2svn to create branch 'RELENG_6'. 2006-04-21 04:28:44 +00:00
rik
f994482cad MFC:
Add support for Cronyx Tau32-PCI adapters. (update)

Approved by:	re(scottl)
2006-03-10 23:10:39 +00:00
jhb
025e3d0a95 MFC: Split struct ithd into struct intr_thread and intr_event and
associated changes.  More details below:

  Remove public declarations of variables that were forgotten when they were
  made static.

  Revision  Changes    Path
  1.31      +0 -1      src/sys/sys/interrupt.h

  Make sure the interrupt is masked before processing it, or bad things
  can happen.

  Revision  Changes    Path
  1.10      +3 -3      src/sys/arm/arm/intr.c

  Reorganize the interrupt handling code a bit to make a few things cleaner
  and increase flexibility to allow various different approaches to be tried
  in the future.
  - Split struct ithd up into two pieces.  struct intr_event holds the list
    of interrupt handlers associated with interrupt sources.
    struct intr_thread contains the data relative to an interrupt thread.
    Currently we still provide a 1:1 relationship of events to threads
    with the exception that events only have an associated thread if there
    is at least one threaded interrupt handler attached to the event.  This
    means that on x86 we no longer have 4 bazillion interrupt threads with
    no handlers.  It also means that interrupt events with only INTR_FAST
    handlers no longer have an associated thread either.
  - Renamed struct intrhand to struct intr_handler to follow the struct
    intr_foo naming convention.  This did require renaming the powerpc
    MD struct intr_handler to struct ppc_intr_handler.
  - INTR_FAST no longer implies INTR_EXCL on all architectures except for
    powerpc.  This means that multiple INTR_FAST handlers can attach to the
    same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach
    to the same interrupt.  Sharing INTR_FAST handlers may not always be
    desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun
    either.  Drivers can always still use INTR_EXCL to ask for an interrupt
    exclusively.  The way this sharing works is that when an interrupt
    comes in, all the INTR_FAST handlers are executed first, and if any
    threaded handlers exist, the interrupt thread is scheduled afterwards.
    This type of layout also makes it possible to investigate using interrupt
    filters ala OS X where the filter determines whether or not its companion
    threaded handler should run.
  - Aside from the INTR_FAST changes above, the impact on MD interrupt code
    is mostly just 's/ithread/intr_event/'.
  - A new MI ddb command 'show intrs' walks the list of interrupt events
    dumping their state.  It also has a '/v' verbose switch which dumps
    info about all of the handlers attached to each event.
  - We currently don't destroy an interrupt thread when the last threaded
    handler is removed because it would suck for things like ppbus(8)'s
    braindead behavior.  The code is present, though, it is just under
    #if 0 for now.
  - Move the code to actually execute the threaded handlers for an interrrupt
    event into a separate function so that ithread_loop() becomes more
    readable.  Previously this code was all in the middle of ithread_loop()
    and indented halfway across the screen.
  - Made struct intr_thread private to kern_intr.c and replaced td_ithd
    with a thread private flag TDP_ITHREAD.
  - In statclock, check curthread against idlethread directly rather than
    curthread's proc against idlethread's proc. (Not really related to intr
    changes)

  Tested on:      alpha, amd64, i386, sparc64
  Tested on:      arm, ia64 (older version of patch by cognet and marcel)

  Revision  Changes    Path
  1.88      +43 -29    src/sys/alpha/alpha/interrupt.c
  1.38      +5 -5      src/sys/alpha/isa/isa.c
  1.16      +58 -52    src/sys/amd64/amd64/intr_machdep.c
  1.6       +1 -1      src/sys/amd64/include/intr_machdep.h
  1.16      +2 -2      src/sys/amd64/isa/atpic.c
  1.11      +28 -22    src/sys/arm/arm/intr.c
  1.462     +2 -2      src/sys/dev/sio/sio.c
  1.6       +1 -1      src/sys/dev/uart/uart_kbd_sun.c
  1.24      +2 -2      src/sys/dev/uart/uart_tty.c
  1.15      +58 -52    src/sys/i386/i386/intr_machdep.c
  1.8       +1 -1      src/sys/i386/include/intr_machdep.h
  1.21      +2 -2      src/sys/i386/isa/atpic.c
  1.52      +32 -25    src/sys/ia64/ia64/interrupt.c
  1.180     +3 -2      src/sys/kern/kern_clock.c
  1.127     +437 -270  src/sys/kern/kern_intr.c
  1.206     +0 -1      src/sys/kern/subr_witness.c
  1.6       +3 -3      src/sys/powerpc/include/intr_machdep.h
  1.7       +35 -32    src/sys/powerpc/powerpc/intr_machdep.c
  1.14      +1 -1      src/sys/sparc64/include/intr_machdep.h
  1.24      +43 -36    src/sys/sparc64/sparc64/intr_machdep.c
  1.32      +36 -36    src/sys/sys/interrupt.h
  1.440     +1 -3      src/sys/sys/proc.h

  Catch up with interrupt-thread changes.

  Revision  Changes    Path
  1.32      +1 -1      src/sys/dev/zs/zs.c

  Catch up with new interrupt handling code.

  Revision  Changes    Path
  1.16      +3 -3      src/sys/netgraph/bluetooth/drivers/bt3c/ng_bt3c_pccard.c

  Catch up with new interrupt handling code.

  Revision  Changes    Path
  1.162     +2 -2      src/sys/dev/cy/cy.c
  1.101     +2 -2      src/sys/dev/rc/rc.c

  Catch up with new interrupt handling code.

  Revision  Changes    Path
  1.50      +2 -2      src/sys/dev/cx/if_cx.c
  1.41      +1 -1      src/sys/dev/sab/sab.c
  1.238     +2 -2      src/sys/pc98/cbus/sio.c

  Add a swi_remove() function to teardown software interrupt handlers.  For
  now it just calls intr_event_remove_handler(), but at some point it might
  also be responsible for tearing down interrupt events created via swi_add.

  Revision  Changes    Path
  1.128     +17 -0     src/sys/kern/kern_intr.c
  1.33      +1 -0      src/sys/sys/interrupt.h

  - Use swi_remove() to teardown swi handlers rather than
    intr_event_remove_handler().
  - Remove tty: prefix from a couple of swi handler names.

  Revision  Changes    Path
  1.51      +1 -1      src/sys/dev/cx/if_cx.c
  1.102     +2 -2      src/sys/dev/rc/rc.c
  1.42      +1 -1      src/sys/dev/sab/sab.c
  1.25      +1 -1      src/sys/dev/uart/uart_tty.c
  1.33      +1 -1      src/sys/dev/zs/zs.c
  1.17      +2 -2      src/sys/netgraph/bluetooth/drivers/bt3c/ng_bt3c_pccard.c

  Remove a stray return statement in the interrupt dispatch function
  that caused a premature exit after calling a fast interrupt handler
  and bypassing a much needed critical_exit() and the scheduling of
  the interrupt thread for non-fast handlers. In short: unbreak :-)

  Revision  Changes    Path
  1.53      +0 -1      src/sys/ia64/ia64/interrupt.c

  If we get a stray interrupt, return after logging it.  In the extremely
  rare case of a stray interrupt to an unregistered source (such as a stray
  interrupt from the 8259As when using APIC), this could result in a page
  fault when it tried to walk the list of interrupt handlers to execute
  INTR_FAST handlers.  This bug was introduced with the intr_event changes,
  so it's not present in 5.x or 6.x.

  Submitted by:   Mark Tinguely tinguely at casselton dot net

  Revision  Changes    Path
  1.17      +1 -0      src/sys/amd64/amd64/intr_machdep.c
  1.16      +1 -0      src/sys/i386/i386/intr_machdep.c

Approved by:	re (scottl)
2006-03-10 19:37:35 +00:00
cvs2svn
9cb23632cc This commit was manufactured by cvs2svn to create branch 'RELENG_6'. 2006-03-08 18:03:10 +00:00
jhb
4e42f99cdd MFC: Throw out all the logical APIC ID stuff and just wire up interrupts
to individual CPUs using physical addressing and fixed delivery mode.

Approved by:	re (scottl)
2006-03-07 18:33:21 +00:00
jhb
1169153605 MFC: Change the x86 interrupt code to allocate IDT vectors on-demand.
Approved by:	re (scottl)
2006-03-01 20:50:10 +00:00
sam
ba697e3f0c MFC 1.223: guard function decls with _KERNEL so user code can include this file
Approved by:	re (scottl)
2006-03-01 05:57:15 +00:00
ru
3b474f83c7 MFC: Bring /dev/speaker support to amd64. 2005-11-16 10:50:12 +00:00
jhb
603cac3a99 MFC: Add atomic_fetchadd(9) operation for types int and 32.
Other small updates to atomic(9) include:
- Note that arm and ppc don't provide 64-bit atomic ops.
- Update sample code.

Approved by:	re (scottl)
2005-10-06 18:12:06 +00:00
jhb
0950005259 MFC: Add interrupt counters for IPIs.
Approved by:	re (scottl)
2005-10-04 15:15:22 +00:00
jhb
76e4abfa33 MFC: Stop using the '+' constraint modifier with memory operands in
inline assembly.  We still use it for register operands in various places.

Approved by:	re (kensmith)
2005-09-26 19:54:19 +00:00
jhb
0f21530145 MFC: Explicitly switch to the new TSS when adding one in i386_extend_pcb().
Approved by:	re (kensmith)
2005-09-26 19:38:12 +00:00
imp
9dab83f7b6 MFC: Merge resource fixes for pci devices on pci0 for ioport.
Approved by: re (scottl)
2005-09-18 02:55:10 +00:00
phk
1bc819216b MFC: better facility for extracting and inspecting BIOS strings.
Approved by:	re@
2005-08-16 22:47:14 +00:00
jhb
0ef1901fa9 MFC: Convert the atomic pointer operations to operate on uintptr_t rather
than void *.

Approved by:	re (kensmith)
2005-08-05 19:44:00 +00:00
jhb
febd45c7d3 Some cleanups and tweaks to some of the atomic.h files in preparation for
further changes and fixes in the future:
- Use aliases via macros rather than duplicated inlines wherever possible.
- Move all the aliases to the bottom of these files and the inline
  functions to the top.
- Add various comments.
- On alpha, drop atomic_{load_acq,store_rel}_{8,char,16,short}().
- On i386 and amd64, don't duplicate the extern declarations for functions
  in the two non-inline cases (KLD_MODULE and compiler doesn't do inlines),
  instead, consolidate those two cases.
- Some whitespace fixes.

Approved by:	re (scottl)
2005-07-09 12:38:53 +00:00
thompsa
d7e928629d Check the alignment of the IP header before passing the packet up to the
packet filter. This would cause a panic on architectures that require strict
alignment such as sparc64 (tier1) and ia64/ppc (tier2).

This adds two new macros that check the alignment, these are compile time
dependent on __NO_STRICT_ALIGNMENT which is set for i386 and amd64 where
alignment isn't need so the cost is avoided.

 IP_HDR_ALIGNED_P()
 IP6_HDR_ALIGNED_P()

Move bridge_ip_checkbasic()/bridge_ip6_checkbasic() up so that the alignment
is checked for ipfw and dummynet too.

PR:		ia64/81284
Obtained from:	NetBSD
Approved by:	re (dwhite), mlaier (mentor)
2005-07-02 23:13:31 +00:00
peter
14ff9254d8 Begin promoting the AMD-originated feature flags to first class flags, now
that newer Intel cpu hardware implements them too.  This includes things
like the NX (pte no-execute) flag for execute protection.  We'll need to
reference this for implementing no-exec in pmap.c at some point.

Some feature flags are duplicated in both the Intel-orignated bits and
the AMD bits.  Suppress the the duplicates correctly - the old code
assumed they were a 1:1 mapping which is not correct.  We can't just mask
off the bits present in cpu_feature.

Converge with amd64 where this originated from.

Intel cpu's that implement any AMD features will report them in dmesg now.

Approved by:	re
2005-06-30 06:44:34 +00:00
peter
49bfde6bf0 Switch AMD64 and i386 platforms to using ELF as their kernel crash
dump format.  The key reason to do this is so that we can dump sparse
address space.  For example, we need to be able to skip the PCI hole
just below the 4GB boundary.  Trying to destructively dump MMIO device
registers is Really Bad(TM).  The frequent result of trying to do a
crash dump on a machine with 4GB or more ram was ugly (lockup or reboot).

This code has been taken directly from the IA64 dump_machdep.c code,
with just a few (mostly minor) mods.

Introduce a dump_avail[] array in the machdep.c code so that we have a
source of truth for what memory is present in a machine that needs to be
dumped.  We can't use phys_avail[] because all sorts of things slice
memory out of it that we really need to dump.  eg: the vm page array
and the dmesg buffer.  dump_avail[] is pretty much an unmolested version
of phys_avail[].  It does have Maxmem correction.

Bump the i386 and amd64 dump format to version 2, but nothing actually
uses this.  amd64 was actually using the i386 dump version number.

libkvm support to follow.

Approved by:	re
2005-06-29 22:28:46 +00:00
jkoshy
1d3209ab83 MFP4:
- Implement sampling modes and logging support in hwpmc(4).

- Separate MI and MD parts of hwpmc(4) and allow sharing of
  PMC implementations across different architectures.
  Add support for P4 (EMT64) style PMCs to the amd64 code.

- New pmcstat(8) options: -E (exit time counts) -W (counts
  every context switch), -R (print log file).

- pmc(3) API changes, improve our ability to keep ABI compatibility
  in the future.  Add more 'alias' names for commonly used events.

- bug fixes & documentation.
2005-06-09 19:45:09 +00:00
ups
ebc4f240c3 Add IPI support for preempting a thread on another CPU.
MFC after:	3 weeks
2005-06-09 18:23:54 +00:00
dfr
874478d7fd Add support for XMM registers in GDB for x86 processors that support
SSE (or its successors).

Reviewed by: marcel, davidxu
MFC After: 2 weeks
2005-05-31 09:43:04 +00:00
nyan
0fce92f5c4 Remove bus_{mem,p}io.h and related code for a micro-optimization on i386
and amd64.  The optimization is a trivial on recent machines.

Reviewed by:	-arch (imp, marcel, dfr)
2005-05-29 04:42:30 +00:00
nyan
23e73a4303 Change the spkr_set_pitch() function to a macro to fix low level profiling. 2005-05-28 13:40:27 +00:00
obrien
c0de585b6b Add the 2nd word of IA32 feature flags. This includes things such as SSE3.
Obtained from:	sys/amd64/amd64/identcpu.
2005-05-16 09:47:53 +00:00
nyan
99f1b22233 - Move timerreg.h to <arch>/include and split i8253 specific defines into
i8253reg.h, and add some defines to control a speaker.
- Move PPI related defines from i386/isa/spkr.c into ppireg.h and use them.
- Move IO_{PPI,TIMER} defines into ppireg.h and timerreg.h respectively.
- Use isa/isareg.h rather than <arch>/isa/isa.h.

Tested on: i386, pc98
2005-05-14 09:10:02 +00:00
nectar
9ee23cec03 Add a knob for disabling/enabling HTT, "machdep.hyperthreading_allowed".
Default off due to information disclosure on multi-user systems.

Submitted by:	cperciva
Reviewed by:	jhb
2005-05-13 00:10:56 +00:00
nyan
8f8dbdc2da - Move the NPX_DEBUG option to options.{i386,pc98} and use opt_npx.h.
- Move npx related defines to {i386,pc98}/include/npx.h to remove #include
  {isa,cbus}.h.
2005-05-12 12:47:41 +00:00
jkoshy
a21392e3ac Add convenience APIs pmc_width() and pmc_capabilities() to -lpmc.
Have pmcstat(8) and pmccontrol(8) use these APIs.

Return PMC class-related constants (PMC widths and capabilities)
with the OP GETCPUINFO call leaving OP PMCINFO to return only the
dynamic information associated with a PMC (i.e., whether enabled,
owner pid, reload count etc.).

Allow pmc_read() (i.e., OPS PMCRW) on active self-attached PMCs to
get upto-date values from hardware since we can guarantee that the
hardware is running the correct PMC at the time of the call.

Bug fixes:
 - (x86 class processors) Fix a bug that prevented an RDPMC
   instruction from being recognized as permitted till after the
   attached process had context switched out and back in again after
   a pmc_start() call.

   Tighten the rules for using RDPMC class instructions: a GETMSR
   OP is now allowed only after an OP ATTACH has been done by the
   PMC's owner to itself.  OP GETMSR is not allowed for PMCs that
   track descendants, for PMCs attached to processes other than
   their owner processes.

 - (P4/HTT processors only) Fix a bug that caused the MI and MD
   layers to get out of sync.  Add a new MD operation 'get_config()'
   as part of this fix.

 - Allow multiple system-mode PMCs at the same row-index but on
   different CPUs to be allocated.

 - Reject allocation of an administratively disabled PMC.

Misc. code cleanups and refactoring.  Improve a few comments.
2005-05-01 14:11:49 +00:00
dwhite
c8fa809967 Implement an alternate method to stop CPUs when entering DDB. Normally we use
a regular IPI vector, but this vector is blocked when interrupts are disabled.
With "options KDB_STOP_NMI" and debug.kdb.stop_cpus_with_nmi set, KDB will
send an NMI to each CPU instead. The code also has a context-stuffing
feature which helps ddb extract the state of processes running on the
stopped CPUs.

KDB_STOP_NMI is only useful with SMP and complains if SMP is not defined.
This feature only applies to i386 and amd64 at the moment, but could be
used on other architectures with the appropriate MD bits.

Submitted by:	ups
2005-04-30 20:01:00 +00:00
jkoshy
cb5a9ccd73 Return the correct register number in the 'get_msr()' MD function.
Only allow a process to use the x86 RDPMC instruction if it has
allocated and attached a PMC to itself.

Inform the MD layer of the "pseudo context switch out" that needs
to be done when the last thread of a process is exiting.
2005-04-28 08:13:19 +00:00
marcel
d51b8db969 o Reverse the inclusion chain from MD->MI to MI->MD by removing the
inclusion of <sys/pmc.h> and depending on being included from
   that header file.
o  Include any MD specific header files that otherwise need to be
   included from MI files.

Ok'd: jkoshy@
2005-04-20 20:22:33 +00:00
jkoshy
dc3444cd91 Bring a working snapshot of hwpmc(4), its associated libraries, userland utilities
and documentation into -CURRENT.

Bump FreeBSD_version.

Reviewed by:	alc, jhb (kernel changes)
2005-04-19 04:01:25 +00:00