install custom pager functions didn't actually happen in practice (they
all just used the simple pager and passed in a local quit pointer). So,
just hardcode the simple pager as the only pager and make it set a global
db_pager_quit flag that db commands can check when the user hits 'q' (or a
suitable variant) at the pager prompt. Also, now that it's easy to do so,
enable paging by default for all ddb commands. Any command that wishes to
honor the quit flag can do so by checking db_pager_quit. Note that the
pager can also be effectively disabled by setting $lines to 0.
Other fixes:
- 'show idt' on i386 and pc98 now actually checks the quit flag and
terminates early.
- 'show intr' now actually checks the quit flag and terminates early.
address is in the userland address space. The proper thing is either to choose
a virtual address in the kernel address space beyond the KVA, or to use
pmap_mapdev().
we're unable to allocate the memory for a PTE, we'll wait until we can. If not,
we'll just return.
Use M_NOWAIT|M_USE_RESERVE to allocate PTEs, it is less aggressive than
M_NOWAIT alone.
Suggested by: alc
Make serial ports more robust and reliable. Make non-console ports
work. This might have broken skyeye stuff.
o Introduce ping-pong receive buffers.
o Use DMA to copy characters directly into memory.
o Support baud rates other than 115200
o Use 1 stop bit when 1 stop bit is requested (otherwise 2 were used,
which caused dropped characters when received in bursts).
o Use 1.5 stop bits for 5-bit bytes, and 2 stop bits otherwise when 2
stop bits were requested.
o Actually update line parameters.
o Fix comments
o Move init into attach
o Tweaks to TX interrupt registers to get them reliable and non-storming.
o harvest data in ipend since the latency between it and the callback
was too long. This likely is how it should be, I don't know why I deferred
things to the callback before.
o disable all interrupts in console init. We don't want interrupts until
we turn on an ISR.
o cosmetic tweaks
o Automatically detect of the TIMEOUT interrupt is supported. If so, use
it so we get better CPU utilization. Otherwise do a character at a time
RX. Good news here is that it seems we have enough CPU and low enough
fast interrupt latency to do this reliably.
o Don't read USART_CR. It is a write-only register.
o start to implement bus_ioctl. Do BAUD now...
number of banks, rows and columns the SDRAMC is programmed to access
to determine the RAM size for the board, rather than hard-wiring it to
be 32MB. My company's board with 64MB now probes correctly, as does
the KB9202 with only 32MB. This means that to detect the right memory
size, our boot loader must correctly initialize these values. This is
a fairly safe assumption because the boot loader has to initialize
SDRAM already, and it isn't really possible to change this register
after we've accessed SDRAM.
The boot loader is supposed to leave this bit set to the right value
for the board. If this bit was set at attach time, use it to init the
config register correctly.
Note: this means the boot loader has to properly initialize it.
an explicit comment that it's needed for the linuxolator. This is not the
case anymore. For all other architectures there was only a "KEEP THIS".
I'm (and other people too) running a COMPAT_43-less kernel since it's not
necessary anymore for the linuxolator. Roman is running such a kernel for a
for longer time. No problems so far. And I doubt other (newer than ia32
or alpha) architectures really depend on it.
This may result in a small performance increase for some workloads.
If the removal of COMPAT_43 results in a not working program, please
recompile it and all dependencies and try again before reporting a
problem.
The only place where COMPAT_43 is needed (as in: does not compile without
it) is in the (outdated/not usable since too old) svr4 code.
Note: this does not remove the COMPAT_43TTY option.
Nagging by: rdivacky
There is a race with the current locking scheme and removing
it should have no measurable performance impact.
This fixes page faults leading to panics in pmap_enter_quick_locked()
on amd64/i386.
Reviewed by: alc,jhb,peter,ps
- Try hard to calculate a safe sp, so that the stack doesn't get smashed
while uncompressing or relocating the kernel.
- Bring in code needed to calculate the cacheline size etc, needed for
arm9_idcache_wbinv_all.
current interface with the machine-independent layer. Without this change,
the page daemon would only have been awakened the first time that the
number of pv entries went above the high water mark, not each time.
the first and last cache line in PREREAD, and just invalidate the cache
lines in POSTREAD, instead of write-back/invalidating in POSTREAD, which
could lead to stale data overriding what has been transfered by DMA.
