Commit Graph

52 Commits

Author SHA1 Message Date
mr
b6886fc07b Extend comment in copyright notice as requested by author.
Submitted by:	G.Otsuji
2009-03-29 13:35:20 +00:00
mr
705fd8f6f9 Add support for Phenom (Family 10h) to cpufreq.
Its a newer version provided by the author than in the PR.

PR:		kern/128575
Submitted by:	Gen Otsuji annona2 [at] gmail.com
2009-03-28 08:54:47 +00:00
jkim
a9b956502b Include a missing header file.
Reported by:	thompsa, "build universe"
2009-01-22 20:29:07 +00:00
jkim
ad7caec2a5 Replace couple of strcmp(cpu_vendor, "foo") with cpu_vendor_id for i386
and hide i386-specific code under #ifdef.
2009-01-22 17:06:33 +00:00
jkim
657301ea43 Add Centaur/IDT/VIA vendor ID for Nano family, which has long mode support. 2009-01-05 21:51:49 +00:00
jkim
8c32a34157 Remove an unused variable.
Found with:	Coverity Prevent(tm)
CID:		3677
2008-11-26 22:33:55 +00:00
jkim
d6a4501391 Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").
Reviewed by:	jhb, peter (early amd64 version)
2008-11-26 19:25:13 +00:00
sobomax
0ac4e5e1e1 Add Pentium D cores into the list that can't handle 12.5% and 25%
throttle. My SMP kernel hangs when one of those is selected by
powerd. Errata AA21 here:

ftp://download.intel.com/design/PentiumXE/specupdt/31030717.pdf

MFC after:	2 weeks
2008-11-26 09:46:35 +00:00
jkim
7c5661fe5f Do not use PowerNow! if FID or VID is missing. 2008-10-21 00:52:20 +00:00
jkim
c0da504653 Use power management information for AMD CPUs from identcpu.c. 2008-10-21 00:44:05 +00:00
jhb
069152e433 Add a proper detach method to the est(4) driver using cpufreq_unregister().
MFC after:	1 week
2008-09-10 17:41:41 +00:00
jhb
f4c1f42f3d Fail detach if cpufreq_unregister() fails.
MFC after:	1 week
2008-08-28 19:55:18 +00:00
jhb
0044067c33 Disable the code to generate a simple table from the status MSR by default.
This can be enabled by setting the 'hw.est.msr_info' tunable to 1.
2008-08-26 17:43:46 +00:00
jhb
ca3f42bc92 If we are unable to obtain a frequency list from either ACPI or the static
tables, then attempt to build a simple list containing just the high and
low frequencies based on the current CPU frequency calculated during boot
and the contents of the MSR.

MFC after:	1 month
2008-08-23 12:53:42 +00:00
jhb
3c198486dc Attach the cpufreq child devices with specific orders to enforce relative
priority of some of the drivers that manage the same state (e.g. ichss0
vs est0).  Specifically, powernow, est, and p4tcc are added at order 10,
ichss at order 20, and smist at order 30.  Previously, some laptops were
seeing both ichss0 and est0 attaching and stomping on each other.

XXX: This isn't quite ideal, but works with the existing hacks, I think
what we really want instead is a single "speedstep0" device for CPUs
that the ichss, est, and smist drivers probe (but with differing
priorities).

MFC after:	1 week
2008-08-13 16:09:40 +00:00
jhb
9d81809b1f After probing the available frequency settings, restore the CPU to run at
whatever frequency it started at instead of always picking the highest
frequency.  The first version of this driver attempted to do this, but it
set the speed to the first frequency in the list rather than the value it
had saved.

MFC after:	1 week
Discussed with:	rpaulo, phk
2008-05-30 22:01:09 +00:00
rpaulo
bc47fb57ef Remove unused variable saved_id16.
Pointy hat to:	me
Pointed out by:	jhb
MFC after:	1 week
2008-05-02 10:16:41 +00:00
phk
341d5f653b A cautionary XXX comment about seemingly bogus errata checks. 2008-03-17 09:05:15 +00:00
phk
234bd357a6 Increase time we wait for things to settle to 1 millisecond,
10 microseconds is too short.

Always set the cpu to the highest frequency so that we get through
boot and don't handicap cpus where powerd(8) is not used.
2008-03-17 09:01:43 +00:00
phk
7f4e520791 Revert last commit and stop committing before morning tea. 2008-03-17 09:00:59 +00:00
phk
0ef978b056 Increase time we wait for things to settle to 1 millisecond,
10 microseconds is too short.

Always set the cpu to the highest frequency so that we get through
boot and don't handicap cpus where powerd(8) is not used.
2008-03-17 08:38:38 +00:00
phk
573f4ecf0d Use correct bitmask for identifying chip family. 2008-03-17 00:36:16 +00:00
jhb
e0c2a8245e - Don't execute cpuid to fetch the features. We already have the features
present in cpu_feature2.  Also, use CPUID2_EST rather than a magic
  number.
- Don't free the ACPI settings list in detach if we are going to fail the
  request.  Otherwise an attempt to kldunload est would free the array
  but the driver would keep trying to use it.

MFC after:	1 week
2008-03-10 22:00:35 +00:00
gibbs
2bbc151215 In est_acpi_info(), initialize count before passing its pointer to
CPUFREQ_DRV_SETTINGS().  The value of count on input is used to
prefent overflow of the settings buffer passed into CPUFREQ_DRV_SETTINGS().

This corrects the "est: CPU supports Enhanced Speedstep, but is not recognized."
error on my system.

MFC after: 1 week
2008-03-01 21:58:34 +00:00
rpaulo
c1cd98f421 Validate the id16 values gathered from ACPI (previously a TODO item).
Style changes by me and njl.

Approved by:  	 njl (mentor)
Reviewed by:	 njl (mentor)
Submitted by: 	 Takeharu KATO <takeharu1219 at ybb.ne.jp>
PR:	  	 119350
MFC after:	 1 week
2008-02-28 19:10:42 +00:00
njl
fc4d015820 Use bus_dma to get a page in the first 4 GB. Since the physical address
of the magic string is passed in a 32-bit register, we can't use high
memory in the PAE case.  This also eliminates a use of vtophys().

Tested by:	Jeff Shimbo <jts767 / gmail.com>
MFC after:	1 week
2007-06-17 07:18:23 +00:00
bruno
dcb4be2750 o introduce a flags 'errata' for HW bugs onto the softc.
o remove errata_a0 and introduce the corresponding flags into 'errata'.
o introduce a new errata for K8, namely some platform might set the
  PENDING_BIT but aren't able to unset it, also don't loop forever
  waiting PENDING_BIT being cleared.
o try to introduce a workaround for the PENDING_BIT stuck problem,
o support now half multipliers for K8.

Tested by:	Abdullah Al-Marrie

Approved by:	njl
2007-01-23 19:20:30 +00:00
phk
ef310efff8 Since DELAY() was moved, most <machine/clock.h> #includes have been
unnecessary.
2006-05-16 14:37:58 +00:00
njl
1d3b84d7cb Add support for the VIA C7-M processor family.
Remove an unnecessary check of the table's bus clock.  CPUs that
support this feature export only the high/low settings via the MSR,
packed into 32 bits.

Hardware from:	Centaur Technologies
MFC after:	1 week
2006-05-11 17:35:44 +00:00
cperciva
8a3d42569d Add frequency-voltage tables for Intel 778, 758, 773, 753, and 733J
processors.

Obtained from:	Intel Datasheet 302189-008
2006-02-25 04:55:38 +00:00
njl
c22f362152 Like acpi_throttle, set frequency to 100% in attach. Some BIOSen may set
this value lower, making the system quite slow after booting.
2005-10-23 19:38:06 +00:00
cperciva
874c3a89ec Print cpu_vendor and the MSR value if we don't support this processor
even though we're not asking people to contact us.

Requested by:	njl
2005-07-31 06:42:27 +00:00
cperciva
c060d66ddb Remove the instruction to "contact the maintainer" for unrecognized
CPUs.  Intel refuses to give me the information I need, and getting
more emails about this doesn't help.
2005-07-31 01:57:05 +00:00
njl
02441a3243 Add a driver for SMI-based SpeedStep. The hardware supports two frequency
settings and is an older version of the same design used for ICH SpeedStep.
It is only known to be available on PIIX4 chipsets.

Many thanks to Bruno Ducrot for writing the driver and Jon Noack for
testing.

Submitted by:	Bruno Ducrot
2005-04-19 16:38:24 +00:00
njl
28eaeb9478 Properly terminate the table generated from ACPI info. The cpufreq
settings are length-counted while the EST table is null-terminated.
This fixes extra garbage states being reported with ACPI probing.
2005-04-10 19:57:47 +00:00
njl
355a3fed0d Advertise p4tcc via acpi_get_features() _PDC support. 2005-04-10 19:16:27 +00:00
njl
cecf826138 Add support for _PDC/_OSC by advertising that we support direct access to
the PERF_CTL/STS MSRs via the new acpi_get_features() method.  This should
allow newer systems to use SpeedStep.
2005-04-04 15:51:13 +00:00
njl
54552bb9e6 Remove check of numpst to allow more K8 variants to attach. The other
checks, including cpuid_is_k7(), will catch CPUs that really don't support
this method.

Submitted by:	Bruno Ducrot
Tested by:	Jari Kirma (kirma cs.hut.fi)
2005-03-31 06:11:04 +00:00
njl
b8115cf62b Add the powernow driver, which handles AMD Mobile Athlon PowerNow! (k7)
and AMD Cool&Quiet PowerNow! (k8) cpufreq control.  This driver is enabled
for both i386 and amd64 architectures.  It has both acpi and legacy BIOS
attachments.  Thanks to Bruno Ducrot for writing this driver and Jung-uk
Kim for testing.

Submitted by:	Bruno Ducrot (ducrot:poupinou.org)
2005-03-27 21:44:21 +00:00
njl
6d63884eb3 Add support for probing EST settings from ACPI. This should handle more
modern CPUs that have multiple VID#s that aren't detectable via public
methods.  We use the control value from acpi_perf as the id16 for setting
a given frequency.
2005-03-21 06:43:25 +00:00
njl
0dae5d8c1d Make a pass through all drivers checking specs for desired behavior on
SMP systems.  It appears all drivers except ichss should attach to each
CPU and that settings should be performed on each CPU.  Add comments about
this.  Also, add a guard for p4tcc's identify method being called more than
once.
2005-02-27 02:43:02 +00:00
njl
dde81671fd Correct an off-by-one error in the number of settings est announces.
The extraneous "0" state was not fatal but useless.
2005-02-24 20:20:11 +00:00
njl
4a038de7ac Import a rewrite of p4tcc for the cpufreq(4) framework. This includes
a bugfix of clearing the On-Demand flag when going back to 100%.  It
has been tested and works on an IBM R32.  Note original work done by
Ted Unangst and sobomax@.
2005-02-23 16:42:56 +00:00
njl
7cb8584285 Support disabling individual cpufreq drivers with hints, e.g.,
hint.ichss.0.disabled="1"
2005-02-22 06:31:45 +00:00
njl
a38e6eadaa Add the Enhanced SpeedStep driver (EST). Currently, this driver only works
on the previous generation of Pentium-M processors (Banias).  Support for
Dothan and later processors involves working with acpi_perf(4) to extract
information about supported states.  This driver should work on MP systems
including HTT.  It is experimental and may have a few bugs but has been
tested to not crash at least.

Thanks to Colin Percival for his initial work on this driver.
2005-02-20 20:27:59 +00:00
sobomax
72740fc657 Fix the problem with incorrect throttling level reported immediately after
reboot. Safter the reboot the TCC is usually in the Automatic mode, in which
reading current performance level is likely to produce bogus results make sure
to switch it to the On-Demand mode and set to some known performance level.
Unfortunately there is no reliable way to check that TCC is in the Automatic
mode. Reading bit 4 of ACPI Thermal Monitor Control Register produces 0
regardless of the current mode.

MFC after:	1 week
2005-02-07 11:35:24 +00:00
imp
b095a629c1 Start all license/copyright notice comments with /*-, per tradition 2005-01-05 19:10:48 +00:00
sobomax
42e3bb3749 o Fix whitespace bug introduced in the previous commit.
Submitted by:	ru

o Simplify p4tcc_power_profile().

Submitted by:	maxim
2004-08-23 10:09:29 +00:00
sobomax
fe731a9733 o Extend boot output: print out mimimum/maximum performance value and number
of performance steps available;

o similarly to Enhanced SpeedStep driver, export list of all available steps
  via hw.p4tcc.cpuperf_levels sysctl.
2004-08-23 09:47:56 +00:00
maxim
1631601f6d o Typo: Ternal -> Thermal. 2004-02-29 18:30:35 +00:00