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3498 Commits

Author SHA1 Message Date
Andrew Turner
ee211e0268 Stop adding an extra null terminator to strings, OF_getprop already returns 
a null terminated string.
 2016-02-12 17:04:03 +00:00
Andrew Turner
77fc1120a7 Enable ARM_INTRNG on all kernel configs where we use the Generic Interrupt 
Controller.

Sponsored by:	ABT Systems Ltd
 2016-02-11 18:01:10 +00:00
Andrew Turner
647a3bac7e Stop defining fdt_pic_table when building for ARM_INTRNG. 2016-02-11 11:49:27 +00:00
Andrew Turner
75d36854d4 Remove unused Zedboard config files. files.zedboard was empty other than 
comments, and std.zedboard just pointed to files.zedboard and std.xilinx.
 2016-02-11 10:48:15 +00:00
Andrew Turner
09bcaf7acc Fix a logic inversion when checking for ARM_INTRNG 
Pointy hat to:	andrew
 2016-02-10 16:44:20 +00:00
Andrew Turner
c5fdd4d379 Only use fdt_pic_table when not using ARM_INTRNG 2016-02-10 16:39:02 +00:00
Andrew Turner
1e2b39a3f2 Use OF_getencprop to read a property, it already handles the endian 
conversion so we don't need to pass the data through fdt32_to_cpu.
 2016-02-10 15:56:52 +00:00
Andrew Turner
907fe11655 Update of the Allwinner drivers to: 
* Use the Linux compat string
 * Use EARLY_DRIVER_MODULE to attach at the right time
 * Add a generic A10 kernel config file
 * A20 now use generic_timer
 * Add two new dts files for Olimex boards
 * Update our custom DTS file for A10 and A20 to use the same compatible
   property names as the vendor ones.

Submitted by:	Emmanuel Vadot <manu@bidouilliste.com>
Differential Revision:	https://reviews.freebsd.org/D4792
 2016-02-10 09:19:29 +00:00
Adrian Chadd
d6233babae Break out the shared bits of the arm intrng definitions into sys/intr.h; 
leave the machine dependent bits in sys/arm/.

This is in preparation for MIPS INTRNG work.

Submitted by:	Stanislav Galabov <sgalabov@gmail.com>
 2016-02-10 04:43:08 +00:00
Gleb Smirnoff
b28cc462ad Include sys/_task.h into uma_int.h, so that taskqueue.h isn't a 
requirement for uma_int.h.

Suggested by:	jhb
 2016-02-09 20:22:35 +00:00
Andrew Turner
23da15d045 Remove unneeded whitespace, and fix a license for a new file. Extracted 
from a larger patch.

Submitted by:	Emmanuel Vadot <manu@bidouilliste.com>
X-Differential Revision:	https://reviews.freebsd.org/D4792
 2016-02-09 18:19:24 +00:00
Michal Meloun
a89156f53f ARM: Use new ARMv6 naming conventions for cache and TLB functions 
in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.
 2016-02-05 14:57:41 +00:00
Svatopluk Kraus
3af1c2aae2 Follow up r295257 and replace bad reference to TEX in defines, 
variables and functions. This stuff is named properly now.

Thus, the VM_MEMATTR_xxx is an index to PTE2 attribute table.

Pointy hat to:	skra
 2016-02-05 11:28:35 +00:00
Svatopluk Kraus
a901e7b637 Follow up r295257 and convert also pt_memattr. This did not break 
anything as both VM_MEMATTR_WB_WA and PTE2_ATTR_WB_WA are zero.
Correct also type of pmap_dcache_wb_pou() last argument.
 2016-02-05 10:40:01 +00:00
Michal Meloun
3025d19dfc ARM: Introduce new cpu-v4.h header and move all ARMv4 specific code 
from cpu-v6.h to it.
Remove unneeded cpu-v6.h includes.
 2016-02-05 09:46:24 +00:00
Michal Meloun
49475a5b47 Replace broken implementation of fuswintr() and suswintr() by functions 
which return -1 as well as on tier 1 archs. Remove block_userspace_access
used only in these implementations.

(1) These functions may be called in interrupt context and pcb_onfault
can be already set in this time. Thus, prior pcb_onfault must be saved
and restored afterwards.

(2) The check that an abort came either from nested interrupt or while
in critical section or holding not sleepable lock must be avoided for
this case.

These functions are called only for profiling reason, so there will be
only small gain by making the code more complex.
 2016-02-04 17:01:38 +00:00
Michal Meloun
dfa0f9c66a ARM: For ARMv6/v7, code in locore.S initializes SCTLR and ACTRL registers. 
Don't duplicate this initialization in cpu_setup().
 2016-02-04 14:32:48 +00:00
Svatopluk Kraus
82f313b3f0 Make VM_MEMATTR_xxx definitions independent on pmap internals 
for __ARM_ARCH >= 6.

It's TEX class number now, so it still has some meaning.
 2016-02-04 14:15:24 +00:00
Michal Meloun
a65bd3c84b ARM: Set UNAL_ENABLE bit in SCTLR CP15 register. This bit is RAO/SBOP 
for ARMv7. For ARMv6, it controls ARMv5 compatible alignment support.
This bit have no effect until unaligned access is enabled.
 2016-02-04 14:02:42 +00:00
Svatopluk Kraus
f196c10421 Small rearrangement of abort_handler(). 
(1) Move cnt.v_trap increment to the beginning. There is cnt.v_vm_faults
counter in vm_fault(), so a number of hardware emulation aborts may be
get roughly as difference.
(2) Move kdb_reenter() up to not be ignored if pmap_fault() has failed.
(3) Update comments.
 2016-02-04 13:35:40 +00:00
Michal Meloun
f7e5efbbae ARM: RPI-B kernel was broken by r294740. Make it functional again. 2016-02-04 13:32:29 +00:00
Michal Meloun
0b5afe4aea ARM: Don't use ugly (and hidden) global variable, control register is 
readable at any time.
 2016-02-04 12:11:18 +00:00
Ruslan Bukin
ef9ca62c6b Fix build. 2016-02-04 12:06:06 +00:00
Michal Meloun
98d40dd063 ARM: Remove unused symbols from genassym.c. 2016-02-04 06:39:20 +00:00
Michal Meloun
d1e8cd8a88 ARM: Consistently use cpu_setttb() instead of setttb(). 
Remove unused #define for drain_writebuf.
 2016-02-03 16:44:06 +00:00
Michal Meloun
d397c7a0af ARM: Replace only once used cpu_icache_sync_all() by ranged equivalent. 
Remove it from cpu_functions table.
 2016-02-03 13:47:50 +00:00
Svatopluk Kraus
b4ae00fcd7 Partly revert r295168 and define PTE_DEVICE in pmap-v6.h header again. 
It turned out that devmap.c is not only file in which PTE_DEVICE
is used and simultaneously, built for both armv4 and armv6 platforms.

When I tried to build all arm kernels before r295168 commit, it was
hid by some other local changes in my tree. I hope that this is just
temporary workaround before VM_MEMATTR_DEVICE could be used instead of
PTE_DEVICE outside of pmap code for __ARM_ARCH < 6.
 2016-02-03 12:11:07 +00:00
Michal Meloun
24fbfc5fd5 ARM: Remove C++ comments erroneously committed in r295200. 2016-02-03 10:39:29 +00:00
Michal Meloun
afdcfee483 ARM: Remove support for xscale i80219 and i80321 CPUs. We haven't single 
supported config/board with these CPUs.
 2016-02-03 09:15:44 +00:00
Michal Meloun
619552c93a ARM: The arm/xscale/i80321 directory is now orphaned, but two drivers 
are shared with i8134x. In preparation for removal of i80321, copy these
drivers to i8134x.
 2016-02-03 08:59:12 +00:00
Michal Meloun
8b77f22e7a ARM: acle-compat.h is arm specific header, don't include it for aarch64. This 
fixes aarch64 buildkernel.
 2016-02-03 08:12:21 +00:00
Svatopluk Kraus
677ba8502b Use pmap_preboot_map_attr() directly in arm_devmap_bootstrap() 
instead of hiding behind pmap_map_chunk(). It's not longer needed
after old pmap-v6 code was removed.

For compatibility with __ARM_ARCH < 6, define PTE_DEVICE in devmap.c
file. Certainly, it would be nice if VM_MEMATTR_DEVICE could be used
even for __ARM_ARCH < 6.
 2016-02-02 21:17:25 +00:00
Svatopluk Kraus
0a57d9e4c3 Make pmap_preboot_map_attr() vm subsystem compliant, so its arguments 
do not depend on pmap internals. This is a preparation for hiding
internal pmap definitions as much as possible from the rest of system.

Simultaneously, the protection argument evaluation is fixed. Happily,
it did not effect the mappings. And it's the reason why it was not fixed
earlier.
 2016-02-02 21:10:55 +00:00
Michal Meloun
e3f95afdec ARM: All remaining functions in cpufunc_asm_arm10.S are identical with 
functions in cpufunc_asm_arm9.S. Use arm9 variants and remove
cpufunc_asm_arm10.S completly.
 2016-02-02 14:53:34 +00:00
Michal Meloun
fc4c15c466 ARM: Remove last unused function, cpu_flush_prefetchbuf(), 
from cpu_functions table.
 2016-02-02 10:50:32 +00:00
Svatopluk Kraus
e81df52303 Remove all remaining references to old and not more used struct 
pmap_devmap, pmap_devmap_bootstrap() and pmap_devmap[]. It was
replaced in r257660.
 2016-02-02 10:32:45 +00:00
Svatopluk Kraus
6f95e9062b Fix setting of protection bits for page table entries in pmap_map(). This 
function is only called from vm_page_startup() and vm_reserv_startup().
I.e. during vm subsystem initialization. As VM_PROT_WRITE is always
used in these calls, the typo did not have any effect. Likely, it's
the reason why it wasn't discovered so long.
 2016-02-02 10:17:51 +00:00
Svatopluk Kraus
d713568142 Remove all stuff related to __ARM_ARCH >= 6 from pmap.h header except 
for <machine/pmap-v6.h> include. It was used by old pmap-v6 code.
 2016-02-01 19:43:04 +00:00
Svatopluk Kraus
231ccab8e7 Remove not needed <machine/pte.h> includes. 2016-02-01 19:36:33 +00:00
Michal Meloun
ebda969939 ARM: Rename remaining instances of cpufunc_id() to cpu_ident(), 
forgotten in r295096.
Remove tlb_flushI/tlb_flushI_SE functions forgotten in r295122.
 2016-02-01 14:28:58 +00:00
Michal Meloun
03fa312bb7 ARM: Remove never used cpu_tlb_flushI and cpu_tlb_flushI_SE() functions 
and their implementations.
 2016-02-01 13:13:53 +00:00
Michal Meloun
3fa3c8c7b5 ARM: Fix END() symbol for cpu_ident function. I forgot to rename it 
in r295096.
 2016-01-31 16:55:52 +00:00
Michal Meloun
bf488b9dde ARM: cpufunc_domains, cpufunc_faultstatus and cpufunc_faultaddress 
functions are equal for all ARM variants. Remove them from cpu_functions
table.
 2016-01-31 16:34:06 +00:00
Michal Meloun
0d87509689 ARM: Next round of cpufunc.* cleaning. Nobody uses flush_brnchtgt* functions, 
delete them.
 2016-01-31 15:36:13 +00:00
Michal Meloun
24338d26d4 ARM: First round of cpufunc.* cleaning. All abort_fixup functions are 
not currently used or defined. Delete them.
 2016-01-31 13:59:16 +00:00
Michal Meloun
83242da4a9 ARM: Rename ARM specific VM_MEMATTR_WT memory attribute to standard one. 2016-01-31 09:16:20 +00:00
Michal Meloun
74767d85c1 ARM: Convert spaces to tabs, fix formatting. 
Not a functional change.
 2016-01-31 08:53:53 +00:00
Michal Meloun
23c2675f0c ARM: Next round of cleanup in swtch-v*.S. 
- remove now useless #if __ARM_ARCH conditional
 - use macro for accessing CP15 registers
 - remove unused PCPU_SIZE

Pointed by: kib
 2016-01-31 08:06:22 +00:00
Michal Meloun
eefa6312dd ARM: Remove TLB IPI. 
We don't support SMP on ARMv6. All ARMv7 multicore cpus already uses
hardware broadcast for TLB and cache operations.
 2016-01-30 13:11:13 +00:00
Michal Meloun
3753ce3c75 ARM: Cleanup mp_machdep.c. SMP is supported only on ARMv6 and later. 2016-01-30 12:23:28 +00:00