Commit Graph

18 Commits

Author SHA1 Message Date
mmel
fd38ead294 ARM: Use new ARMv6 naming conventions for cache and TLB functions
in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.
2016-02-05 14:57:41 +00:00
gonzo
7d629663f2 Fix order of last two arguments of mtx_init
Spotted by: jmcneill@NetBSD.org
2016-01-14 20:25:22 +00:00
skra
a807c265df Fix inconsistent use of malloc type for cdev private data.
Remove M_VCHIQ malloc type, now not used anywhere.

Reviewed by:	gonzo
Approved by:	kib (mentor)
2015-11-23 13:23:53 +00:00
skra
db6f1700ec Fix slots DMA memory handling. It's similar to r290553.
Discussed with:	gonzo
Approved by:	kib (mentor)
2015-11-10 10:56:52 +00:00
skra
32f0ed67b3 Fix pagelist bus_dmamap_t map handling. Memory for pagelist is allocated
by bus_dmamem_alloc() which creates associated bus_dmamap_t map for us.
When this memory is freed by bus_dmamem_free(), the map is freed as well.

Thus there is no need to free it explicitly by bus_dmamap_destroy(),
which leads to double freeing.

Discussed with:	gonzo
Approved by:	kib (mentor)
2015-11-08 18:48:35 +00:00
gonzo
f2e5474578 vchiq interrupt is MP safe, add respective flag to bus_setup_intr 2015-11-08 03:54:15 +00:00
gonzo
c217a91774 Fix locking for VCHI driver by matching sleepable/non-sleepable APIs:
- Emulate Linux mutex API using sx(9) locks with only exclusive operations
    instead of mutex(9), in Linux mutexes are sleepable.
- Emulate Linux rwlock_t using rwlock(9) instead of sx(9). rwlock_t
    in Linux are spin locks
2015-11-08 03:53:31 +00:00
gonzo
5ac24164c9 Fix cache issues with bulk transfers
- Use pmap_quick_enter_page/pmap_quick_remove_page to bounce non-cacheline
    aligned head and tail fragments
- Switch from static fragment size to configurable one, newer firmware
    passes cache line size as cache_line_size DTB parameter.

With these changes both RPi and RPi2 pass functinal part of vchiq_test
2015-11-03 05:25:06 +00:00
gonzo
18f0219226 Synchronize with latest upstream VCHI code:
- Add LIB_VERSION ioctl
- Add CLOSE_DELIVERED ioctl
- Bump code version

Upstream version: 3782f2ad42c08f4d32f64138f8be7341afc380f5
2015-11-01 22:17:39 +00:00
gonzo
b222411003 Fix BULK read transfer if destination buffer is not cache line-aligned.
We can't use copyout because destination memory is userland address
in another process but we have reference to respective page so map
the page into kernel address space and copy fragments there
2015-10-30 01:19:04 +00:00
jkim
318c4f97e6 CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten
years for head.  However, it is continuously misused as the mpsafe argument
for callout_init(9).  Deprecate the flag and clean up callout_init() calls
to make them more consistent.

Differential Revision:	https://reviews.freebsd.org/D2613
Reviewed by:	jhb
MFC after:	2 weeks
2015-05-22 17:05:21 +00:00
andrew
fa83f1799e Use the dsb macro to use the correct instruction when building for ARMv7. 2015-03-19 11:34:51 +00:00
gonzo
a2f90dc153 Fix build without INVARIANTS/INVARIANT_SUPPORT:
- Replace "emulation" of return in lmutex_lock_interruptible macros by
    proper static/inline function.

Submitted by:	Guy Yur
2015-02-13 02:10:09 +00:00
gonzo
f34d9c4728 - Perform bus_dmamap_sync on pagelist structure
- Wire pages of bulk transfer buffer when preparing pagelist
2015-02-12 04:31:17 +00:00
gonzo
0e8f15c195 Do not mark shared structures as __packed, it leads to race condition
If structure packed as __packed clang (and probably gcc) generates
code that loads word fields (e.g. tx_pos)  byte-by-byte and if it's
modified by VideoCore in the same time as ARM loads the value result
is going to be mixed combination of bytes from previous value and
new one.
2015-02-09 02:31:27 +00:00
gonzo
17a9c0e974 Remove unused variables 2015-02-09 02:27:33 +00:00
gonzo
dfd9900789 Act as a bus in attach method: probe and attach devices 2015-02-08 01:12:23 +00:00
gonzo
56215941dd Import VCHI driver for Broadcom's VideoCore IV GPU
Differential Revision:	D1753
2015-02-05 19:54:03 +00:00