Commit Graph

1172 Commits

Author SHA1 Message Date
Robert Noland
cfd7bacef2 Update d_mmap() to accept vm_ooffset_t and vm_memattr_t.
This replaces d_mmap() with the d_mmap2() implementation and also
changes the type of offset to vm_ooffset_t.

Purge d_mmap2().

All driver modules will need to be rebuilt since D_VERSION is also
bumped.

Reviewed by:	jhb@
MFC after:	Not in this lifetime...
2009-12-29 21:51:28 +00:00
Rui Paulo
0ce207d2af Intel XScale hwpmc(4) support.
This brings hwpmc(4) support for 2nd and 3rd generation XScale cores.
Right now it's enabled by default to make sure we test this a bit.
When the time comes it can be disabled by default.
Tested on Gateworks boards.

A man page is coming.

Obtained from:	//depot/user/rpaulo/xscalepmc/...
2009-12-23 23:16:54 +00:00
Doug Barton
f1bdf073c1 Add INCLUDE_CONFIG_FILE, and a note in comments about how to also
include the comments with CONFIGARGS
2009-12-16 02:17:43 +00:00
Alexander Motin
402ea18cbd Fix the build. 2009-12-08 21:42:04 +00:00
Alexander Motin
066f913a94 MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by:	nwitehorn (powerpc part)
2009-12-06 00:10:13 +00:00
Andrew Thompson
1813b93dc1 Add missing ath_ar9* ath hal entries. 2009-12-02 00:38:11 +00:00
Andrew Thompson
d3da916e6e Remove unknown ath hal device entries. 2009-12-02 00:37:03 +00:00
Alan Cox
e2997fea72 Simplify the invocation of vm_fault(). Specifically, eliminate the flag
VM_FAULT_DIRTY.  The information provided by this flag can be trivially
inferred by vm_fault().

Discussed with:	kib
2009-11-27 20:24:11 +00:00
John Baldwin
3064f0530b - Initialize callout before it is used in atestop() during attach.
- Reorder detach so that ether_ifdetach() is called first.  This removes
  the race that ATE_FLAG_DETACHING closed, so that flag can be removed.
- Trim a duplicate clearing of IFF_DRV_RUNNING.

Reviewed by:	imp
2009-11-19 22:04:02 +00:00
John Baldwin
e21e2eea58 These drivers only set if_timer but never set if_watchdog. Just remove
the assignments to if_timer.
2009-11-19 18:11:23 +00:00
Konstantin Belousov
a7b890448c Extract the code that records syscall results in the frame into MD
function cpu_set_syscall_retval().

Suggested by:	marcel
Reviewed by:	marcel, davidxu
PowerPC, ARM, ia64 changes:	marcel
Sparc64 tested and reviewed by:	marius, also sunv reviewed
MIPS tested by:	gonzo
MFC after:	1 month
2009-11-10 11:43:07 +00:00
Marcel Moolenaar
4590f2282a Fix gdb_cpu_getreg() to actually match GDB's register
definition.
2009-11-05 06:31:50 +00:00
Marcel Moolenaar
2ffa44209a Implement db_trace_thread() by calling db_stack_trace_cmd() and
passing a frame pointer that comes from the thread context. This
fixes DDB backtraces by not unwinding debugger functions first.
2009-11-05 06:27:46 +00:00
Marcel Moolenaar
faa7ba7a3f Implement db_trace_self() by calling db_stack_trace_cmd()
and not db_trace_thread().
2009-11-05 06:23:02 +00:00
Alan Cox
c346328f95 Eliminate an unnecessary vm include file. 2009-11-04 04:41:03 +00:00
Alexander Motin
ebbb35ba70 MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.
2009-10-31 13:24:14 +00:00
Konstantin Belousov
d6e029adbe In r197963, a race with thread being selected for signal delivery
while in kernel mode, and later changing signal mask to block the
signal, was fixed for sigprocmask(2) and ptread_exit(3). The same race
exists for sigreturn(2), setcontext(2) and swapcontext(2) syscalls.

Use kern_sigprocmask() instead of direct manipulation of td_sigmask to
reschedule newly blocked signals, closing the race.

Reviewed by:	davidxu
Tested by:	pho
MFC after:	1 month
2009-10-27 10:47:58 +00:00
Marcel Moolenaar
191bb483f2 Review previous change. It has no relation to the I-cache coherency
changes and thus unintentional.

Spotted by: rdivacky@
2009-10-21 18:44:00 +00:00
Marcel Moolenaar
1a4fcaebe3 o Introduce vm_sync_icache() for making the I-cache coherent with
the memory or D-cache, depending on the semantics of the platform.
    vm_sync_icache() is basically a wrapper around pmap_sync_icache(),
    that translates the vm_map_t argumument to pmap_t.
o   Introduce pmap_sync_icache() to all PMAP implementation. For powerpc
    it replaces the pmap_page_executable() function, added to solve
    the I-cache problem in uiomove_fromphys().
o   In proc_rwmem() call vm_sync_icache() when writing to a page that
    has execute permissions. This assures that when breakpoints are
    written, the I-cache will be coherent and the process will actually
    hit the breakpoint.
o   This also fixes the Book-E PMAP implementation that was missing
    necessary locking while trying to deal with the I-cache coherency
    in pmap_enter() (read: mmu_booke_enter_locked).

The key property of this change is that the I-cache is made coherent
*after* writes have been done. Doing it in the PMAP layer when adding
or changing a mapping means that the I-cache is made coherent *before*
any writes happen. The difference is key when the I-cache prefetches.
2009-10-21 18:38:02 +00:00
John Baldwin
b675ebba10 Sync with other GENERIC kernel configs:
- Move USB serial drivers earlier to match their placement in other kernel
  configs.
- Add descriptions to various USB drivers.
- Move the USB wireless drivers into a new section.
- Add ulscom to the list of USB serial drivers.
2009-10-13 19:04:01 +00:00
Konstantin Belousov
023063938a Define architectural load bases for PIE binaries. Addresses were selected
by looking at the bases used for non-relocatable executables by gnu ld(1),
and adjusting it slightly.

Discussed with:	bz
Reviewed by:	kan
Tested by:	bz (i386, amd64), bsam (linux)
MFC after:	some time
2009-10-10 15:31:24 +00:00
Stanislav Sedov
2c7cd48d3c - Drop unused pmap_use_l1 function and comment out currently unused
pmap_dcache_wbinv_all/pmap_copy_page functions which we might want
  to take advatage of later.  This fixes the build with PMAP_DEBUG
  defined.

Discussed with:	cognet
2009-10-05 10:08:58 +00:00
Rui Paulo
bba017d6a0 Remove remaining bits of performance counter support.
Submitted by:	Tom Judge <tom at tomjudge.com>
2009-10-03 13:59:15 +00:00
Bjoern A. Zeeb
52bf2041ac Make sure that the primary native brandinfo always gets added
first and the native ia32 compat as middle (before other things).
o(ld)brandinfo as well as third party like linux, kfreebsd, etc.
stays on SI_ORDER_ANY coming last.

The reason for this is only to make sure that even in case we would
overflow the MAX_BRANDS sized array, the native FreeBSD brandinfo
would still be there and the system would be operational.

Reviewed by:	kib
MFC after:	1 month
2009-10-03 11:57:21 +00:00
Rui Paulo
f143a35bf1 Remove performance counter headers. This code came from NetBSD, but our
hardware perf. counter support is different, so we don't need these
files.

Reviewed by:	freebsd-arm (no comments)
2009-10-02 11:10:05 +00:00
Rui Paulo
98c53ad360 Promote the cpu_class local variable to global and expose it in md_var.h
Reviewed by:	freebsd-arm
2009-09-26 16:37:23 +00:00
Alan Cox
fe105d45a2 Add a new sysctl for reporting all of the supported page sizes.
Reviewed by:	jhb
MFC after:	3 weeks
2009-09-18 17:04:57 +00:00
Poul-Henning Kamp
a254d1f16d Get rid of the _NO_NAMESPACE_POLLUTION kludge by creating an
architecture specific include file containing the _ALIGN*
stuff which <sys/socket.h> needs.
2009-09-08 20:45:40 +00:00
Konstantin Belousov
8a945d109c Reintroduce the r196640, after fixing the problem with my testing.
Remove the altkstacks, instead instantiate threads with kernel stack
allocated with the right size from the start. For the thread that has
kernel stack cached, verify that requested stack size is equial to the
actual, and reallocate the stack if sizes differ [1].

This fixes the bug introduced by r173361 that was committed several days
after r173004 and consisted of kthread_add(9) ignoring the non-default
kernel stack size.

Also, r173361 removed the caching of the kernel stacks for a non-first
thread in the process. Introduce separate kernel stack cache that keeps
some limited amount of preallocated kernel stacks to lower the latency
of thread allocation. Add vm_lowmem handler to prune the cache on
low memory condition. This way, system with reasonable amount of the
threads get lower latency of thread creation, while still not exhausting
significant portion of KVA for unused kstacks.

Submitted by:	peter [1]
Discussed with:	jhb, julian, peter
Reviewed by:	jhb
Tested by:	pho (and retested according to new test scenarious)
MFC after:	1 week
2009-09-01 11:41:51 +00:00
Konstantin Belousov
f25fa6abb2 Reverse r196640 and r196644 for now. 2009-08-29 21:53:08 +00:00
Konstantin Belousov
c3cf0b476f Remove the altkstacks, instead instantiate threads with kernel stack
allocated with the right size from the start. For the thread that has
kernel stack cached, verify that requested stack size is equial to the
actual, and reallocate the stack if sizes differ [1].

This fixes the bug introduced by r173361 that was committed several days
after r173004 and consisted of kthread_add(9) ignoring the non-default
kernel stack size.

Also, r173361 removed the caching of the kernel stacks for a non-first
thread in the process. Introduce separate kernel stack cache that keeps
some limited amount of preallocated kernel stacks to lower the latency
of thread allocation. Add vm_lowmem handler to prune the cache on
low memory condition. This way, system with reasonable amount of the
threads get lower latency of thread creation, while still not exhausting
significant portion of KVA for unused kstacks.

Submitted by:	peter [1]
Discussed with:	jhb, julian, peter
Reviewed by:	jhb
Tested by:	pho
MFC after:	1 week
2009-08-29 13:28:02 +00:00
Sam Leffler
4b9222b7ea revert r196600; didn't notice it'd been done already
Submitted by:	jhay
2009-08-27 17:55:44 +00:00
Sam Leffler
418db7a1b2 enable mesh by default 2009-08-27 17:33:44 +00:00
Rafal Jaworowski
7ec5aa41ca Introduce SheevaPlug support.
- The device is based on Marvell 88F6281 system on chip.
  - More info about the platform at http://www.plugcomputer.org

  - To build the FreeBSD kernel:
    make buildkernel TARGET_ARCH=arm KERNCONF=SHEEVAPLUG

  - Installation notes at: http://wiki.freebsd.org/FreeBSDMarvell

Submitted by:	Michal Hajduk
Obtained from:	Semihalf
2009-08-25 10:09:25 +00:00
Rafal Jaworowski
c0d853f6b9 Exclude common Kirkwood settings so they can be shared among various platforms
based on this SOC. This is a preliminary step for SheevaPlug support.

Submitted by:	Michal Hajduk
Obtained from:	Semihalf
2009-08-25 09:39:11 +00:00
Rafal Jaworowski
5694b144c0 Properly handle initial state of power mgmt.
Modules on Marvell SOC can be selectively PM-disabled, and we must not access
disabled devices' registers (attempt to initialize them) unconditionally, as
this leads to the system hang. This patch introduces graceful handling of the
PM state during devices init.

Submitted by:	Michal Hajduk
Obtained from:	Semihalf
2009-08-25 09:35:50 +00:00
Rafal Jaworowski
a7817ce466 Eliminate platform_pmap_init() to simplify Marvell bootstrap code. 2009-08-25 09:30:03 +00:00
Olivier Houchard
7c4e421f76 KDB needs <machine/db_machdep.h>, so move it under #ifdef KDB.
While I'm there, remove dead code, we will never support acorn26.
2009-08-23 23:37:53 +00:00
Olivier Houchard
562c5c5bf0 No need to remove the same flag multiple times. 2009-08-23 19:54:36 +00:00
Stanislav Sedov
2dc8b759bd - Proprely intialize UART parameters at probe stage, so uart(4)
will initialize the FIFO memory correctly on attach.  Before
  that this values was intialized in only in at91_usart_bus_attach
  which is called after the uart(4) memory allocation happens.

Approved by:	re (kib)
MFC after:	1 week
2009-08-15 15:15:20 +00:00
Rafal Jaworowski
cbb3cb151c Use correct wbinv operation in pmap_l2cache_wbinv_range().
Submitted by:	Michal Hajduk
Reviewed by:	stas
Approved by:	re (kib)
Obtained from:	Semihalf
2009-08-13 15:56:09 +00:00
Robert Watson
530c006014 Merge the remainder of kern_vimage.c and vimage.h into vnet.c and
vnet.h, we now use jails (rather than vimages) as the abstraction
for virtualization management, and what remained was specific to
virtual network stacks.  Minor cleanups are done in the process,
and comments updated to reflect these changes.

Reviewed by:	bz
Approved by:	re (vimage blanket)
2009-08-01 19:26:27 +00:00
John Baldwin
013818111a Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar to
a device pager (OBJT_DEVICE) object in that it uses fictitious pages to
provide aliases to other memory addresses.  The primary difference is that
it uses an sglist(9) to determine the physical addresses for a given offset
into the object instead of invoking the d_mmap() method in a device driver.

Reviewed by:	alc
Approved by:	re (kensmith)
MFC after:	2 weeks
2009-07-24 13:50:29 +00:00
Rafal Jaworowski
84a5818564 Make dcache_inv_range() point to the proper routines on ARM9 and ARM9E/ARM10.
On some ARM variations CPU func dispatcher has the D-cache invalidate method
point to write-back invalidate, which is wrong, and can lead to a crash/panic
on affected platforms.

Spotted by:	HPS
Reviewed by:	cognet
Approved by:	re (kib)
2009-07-21 08:29:19 +00:00
Rafal Jaworowski
331f685743 ARM pmap fixes.
a)  nocache-remap problem

   When a page is remapped into a non-cacheable virtual memory region there
   was no associated write-back invalidate operation performed. We remove
   writeback of the original buffer size from bus_dmamem_alloc() and add
   appropriate L1/L2 flush operation.

b) missing write-back invalidate operation

   In pmap_kremove a page is removed so we must do a write-back
   invalidate operation aligned to the page virtual address.

Submitted by:	Michal Hajduk
Reviewed by:	Mark Tinguely, rpaulo, stas
Approved by:	re (kib)
Obtained from:	Semihalf
2009-07-20 07:53:07 +00:00
Rui Paulo
8b9fde4324 Add IEEE80211_SUPPORT_MESH, following similar change to nanobsd and
other GENERIC kernels.

Approved by:	re (kib)
2009-07-17 18:35:45 +00:00
Alan Cox
3153e878dd Add support to the virtual memory system for configuring machine-
dependent memory attributes:

Rename vm_cache_mode_t to vm_memattr_t.  The new name reflects the
fact that there are machine-dependent memory attributes that have
nothing to do with controlling the cache's behavior.

Introduce vm_object_set_memattr() for setting the default memory
attributes that will be given to an object's pages.

Introduce and use pmap_page_{get,set}_memattr() for getting and
setting a page's machine-dependent memory attributes.  Add full
support for these functions on amd64 and i386 and stubs for them on
the other architectures.  The function pmap_page_set_memattr() is also
responsible for any other machine-dependent aspects of changing a
page's memory attributes, such as flushing the cache or updating the
direct map.  The uses include kmem_alloc_contig(), vm_page_alloc(),
and the device pager:

  kmem_alloc_contig() can now be used to allocate kernel memory with
  non-default memory attributes on amd64 and i386.

  vm_page_alloc() and the device pager will set the memory attributes
  for the real or fictitious page according to the object's default
  memory attributes.

Update the various pmap functions on amd64 and i386 that map pages to
incorporate each page's memory attributes in the mapping.

Notes: (1) Inherent to this design are safety features that prevent
the specification of inconsistent memory attributes by different
mappings on amd64 and i386.  In addition, the device pager provides a
warning when a device driver creates a fictitious page with memory
attributes that are inconsistent with the real page that the
fictitious page is an alias for. (2) Storing the machine-dependent
memory attributes for amd64 and i386 as a dedicated "int" in "struct
md_page" represents a compromise between space efficiency and the ease
of MFCing these changes to RELENG_7.

In collaboration with: jhb

Approved by:	re (kib)
2009-07-12 23:31:20 +00:00
Sam Leffler
8c393fd1f0 Cleanup ALIGNED_POINTER:
o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v)
o define as "1" on amd64 and i386 where there is no restriction
o make the type returned consistent with ALIGN
o remove _ALIGNED_POINTER
o make associated comments consistent

Reviewed by:	bde, imp, marcel
Approved by:	re (kensmith)
2009-07-05 17:45:48 +00:00
Rafal Jaworowski
f981547c99 Map DPCPU pages into ARM kernel VA space.
DPCPU area was not properly mapped into kernel VA space, which caused page
fault on the first DPCPU access. This patch fixes the problem by mapping DPCPU
area into kernel VA space.

Submitted by:	Michal Hajduk, Piotr Ziecik
Reviewed by:	cognet, stas
Approved by:	re (kib)
Obtained from:	Semihalf
2009-07-01 20:07:44 +00:00
Alan Cox
5797795f5a Correct the #endif comment.
Noticed by:	jmallett
Approved by:	re (kib)
2009-06-26 16:22:24 +00:00