11 Commits

Author SHA1 Message Date
njl
1d3b84d7cb Add support for the VIA C7-M processor family.
Remove an unnecessary check of the table's bus clock.  CPUs that
support this feature export only the high/low settings via the MSR,
packed into 32 bits.

Hardware from:	Centaur Technologies
MFC after:	1 week
2006-05-11 17:35:44 +00:00
cperciva
8a3d42569d Add frequency-voltage tables for Intel 778, 758, 773, 753, and 733J
processors.

Obtained from:	Intel Datasheet 302189-008
2006-02-25 04:55:38 +00:00
cperciva
874c3a89ec Print cpu_vendor and the MSR value if we don't support this processor
even though we're not asking people to contact us.

Requested by:	njl
2005-07-31 06:42:27 +00:00
cperciva
c060d66ddb Remove the instruction to "contact the maintainer" for unrecognized
CPUs.  Intel refuses to give me the information I need, and getting
more emails about this doesn't help.
2005-07-31 01:57:05 +00:00
njl
28eaeb9478 Properly terminate the table generated from ACPI info. The cpufreq
settings are length-counted while the EST table is null-terminated.
This fixes extra garbage states being reported with ACPI probing.
2005-04-10 19:57:47 +00:00
njl
cecf826138 Add support for _PDC/_OSC by advertising that we support direct access to
the PERF_CTL/STS MSRs via the new acpi_get_features() method.  This should
allow newer systems to use SpeedStep.
2005-04-04 15:51:13 +00:00
njl
6d63884eb3 Add support for probing EST settings from ACPI. This should handle more
modern CPUs that have multiple VID#s that aren't detectable via public
methods.  We use the control value from acpi_perf as the id16 for setting
a given frequency.
2005-03-21 06:43:25 +00:00
njl
0dae5d8c1d Make a pass through all drivers checking specs for desired behavior on
SMP systems.  It appears all drivers except ichss should attach to each
CPU and that settings should be performed on each CPU.  Add comments about
this.  Also, add a guard for p4tcc's identify method being called more than
once.
2005-02-27 02:43:02 +00:00
njl
dde81671fd Correct an off-by-one error in the number of settings est announces.
The extraneous "0" state was not fatal but useless.
2005-02-24 20:20:11 +00:00
njl
7cb8584285 Support disabling individual cpufreq drivers with hints, e.g.,
hint.ichss.0.disabled="1"
2005-02-22 06:31:45 +00:00
njl
a38e6eadaa Add the Enhanced SpeedStep driver (EST). Currently, this driver only works
on the previous generation of Pentium-M processors (Banias).  Support for
Dothan and later processors involves working with acpi_perf(4) to extract
information about supported states.  This driver should work on MP systems
including HTT.  It is experimental and may have a few bugs but has been
tested to not crash at least.

Thanks to Colin Percival for his initial work on this driver.
2005-02-20 20:27:59 +00:00