Commit Graph

107 Commits

Author SHA1 Message Date
John Baldwin
77fa00fa7c Switch to using the new $PIR interrupt routing code and remove the old
code.  The pci_cfgreg.c file now just controls reading/writing PCI config
registers.
2004-02-18 22:41:53 +00:00
John Baldwin
221111f6f2 Lower the priority of the legacy host to pci bridge driver so that other
non-ACPI host-bridge drivers can preempt this driver.
2003-10-31 21:00:37 +00:00
John Baldwin
729d7ffbcf - Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.
- Add a new PCIM_HDRTYPE constant for the field in PCIR_HDRTYPE that holds
  the header type.
- Replace several magic numbers with appropriate constants for the header
  type register and a couple of PCI_FUNCMAX.
- Merge to amd64 the fix to the i386 bridge code to skip devices with
  unknown header types.

Requested by:	imp (1, 2)
2003-08-28 21:22:25 +00:00
Warner Losh
19b7ffd1b8 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 07:20:27 +00:00
Warner Losh
353adf7e7f The MI code was modified to filter the devices based on its header
type.  We know about header types 0, 1 and 2.  Ignore the rest in the
MD i386 code when we're looking for bridges.  You cannot look at the
vendor tag.  And if you don't you certainly can't look at function > 0
if the device isn't there.

The new soekris boards' GEODE cpu has issues with the old way.  This
is reported to have fixed it.

MFC After: 2 days
2003-08-01 21:50:09 +00:00
John Baldwin
ba40a03417 - Rename nexus_pcib to legacy_pcib. I've been meaning to do this for a
while after the legacy device was added since this driver hangs from
  legacy and not nexus.
- Make several methods non-static so they can be reused in a mptable
  host -> pci bridge driver that will be added at a later date.
- Let legacy_pcib() use pcibios_pcib_route_interrupt() directly instead of
  wrapping it in a private function.  Originally, I thought I was going to
  have the nexus_pcib() driver make a runtime APIC vs. 8259A check and call
  the appropriate routing method (MPTable vs. PIR) that way, but it ended
  up being cleaner to make nexus_pcib() just work with PIR and have a
  separate host -> pci bridge driver for the mptable/apic case.
2003-06-06 17:56:30 +00:00
John Baldwin
cdd83b0ad1 Use the secondary bus number instead of the number of the bus the PCI-PCI
bridge lives on (i.e., the parent bus) when probing the PIR table for a
bus.  This could cause the PCIBIOS PCI-PCI bridge driver to bogusly attach
to bridges that weren't in the PIR but whose parent bus was in the PIR.
2003-06-06 17:27:18 +00:00
David E. O'Brien
71c5a90130 Use __FBSDID(). 2003-06-02 17:01:49 +00:00
Poul-Henning Kamp
d6b602d4b2 Remove unused variable.
Found by:       FlexeLint
2003-05-31 18:55:18 +00:00
Peter Wemm
af3d516f55 Initiate de-orbit burn for USE_PCI_BIOS_FOR_READ_WRITE. This has been
#if'ed out for a while.  Complete the deed and tidy up some other bits.

We need to be able to call this stuff from outer edges of interrupt
handlers for devices that have the ISR bits in pci config space.  Making
the bios code mpsafe was just too hairy.  We had also stubbed it out some
time ago due to there simply being too much brokenness in too many systems.
This adds a leaf lock so that it is safe to use pci_read_config() and
pci_write_config() from interrupt handlers.  We still will use pcibios
to do interrupt routing if there is no acpi.. [yes, I tested this]

Briefly glanced at by:  imp
2003-02-18 03:36:49 +00:00
Poul-Henning Kamp
152e80d952 Outdent the string rather than use concatenation. 2002-12-23 22:12:17 +00:00
Peter Wemm
41f778bb99 Recognize the Serverworks CIOB30 host to pci bridge. 2002-11-13 21:30:44 +00:00
Poul-Henning Kamp
7f30cdf366 Revert last commit, there actually was a -1 waaaaay down in pcireg_cfgread(). 2002-10-20 17:54:17 +00:00
Poul-Henning Kamp
a67ee49294 "id" is never going to be -1 when it is unsigned.
Spotted by:	FlexeLint
2002-10-20 17:21:43 +00:00
John Baldwin
a73f15c7a8 Use the global pcib devclass instead of our own static copy. 2002-10-16 18:38:35 +00:00
Mitsuru IWASAKI
2f00e60504 Add 2 Ids for new ServerWorks host to PCI bridge chipset.
These are still unknown name but these are working as well
as the other ServerWorks chipset.
Description strings should be corrected when the chipsets
are known.

MFC after:	1 week
2002-10-02 17:50:38 +00:00
John Baldwin
b8581e0d56 Now that we only probe host-PCI bridges once, we no longer have to check to
see if we have been probed before by checking for a pciX bus device.
2002-09-23 18:14:31 +00:00
John Baldwin
2ab55f4392 Change the nexus_pcib driver (eventually to be renamed to legacy_pcib) to
hang off of the legacy driver instead of the nexus.
2002-09-23 15:52:30 +00:00
Poul-Henning Kamp
a0c422db00 #include "opt_bla.h" goes first says Bruce. 2002-09-09 08:44:52 +00:00
Poul-Henning Kamp
9339569236 Fix style(9) bugs.
Brucified by:	bde
2002-09-08 15:16:49 +00:00
John Baldwin
7bbb0b56e4 Add a subclass of the PCI-PCI bridge driver that uses the PCIBIOS to
route interrupts if the child bus is described in the PCIBIOS interrupt
routing table.  For child busses that are in the routing table, they do
not necessarily use a 'swizzle' on their pins on the parent bus to route
interrupts for child devices.  If the child bus is an embedded device then
the pins on the child devices can be (and usually are) directly connected
either to a PIC or to a Interrupt Router.  This fixes PCIBIOS interrupt
routing across PCI-PCI bridges for embedded devices.
2002-09-06 22:19:39 +00:00
John Baldwin
8ab96fd8d0 - Add a pci_cfgintr_valid() function to see if a given IRQ is a valid
IRQ for an entry in a PCIBIOS interrupt routing ($PIR) table.
- Change pci_cfgintr() to except the current IRQ of a device as a fourth
  argument and to use that IRQ for the device if it is valid.
- If an intpin entry in a $PIR entry has a link of 0, it means that that
  intpin isn't connected to anything that can trigger an interrupt.  Thus,
  test the link against 0 to find invalid entries in the table instead of
  implicitly relying on the irqs field to be zero.  In the machines I have
  looked at, intpin entries with a link of 0 often have the bits for all
  possible interrupts for PCI devices set.
2002-09-06 17:08:07 +00:00
John Baldwin
cea0a89545 Prefer the physical bus number of the PCI bus as the unit of the pciX
device created.
2002-09-06 16:09:07 +00:00
Poul-Henning Kamp
bd8add3d61 Change the support for AMDs ElanSC520 CPU from being a device driver to
be
	options	CPU_ELAN
(NB: Soekris.com users!)

It is cleaner this way.  We still recognize the cpu on the host-pci bridge.
2002-09-04 19:43:22 +00:00
Poul-Henning Kamp
14a3a6ea0b Move a prototype to the least wrong place.
Suggested by:	bde
2002-08-02 18:45:43 +00:00
Andrew Gallatin
f76ec8facd Add support for probing secondary buses on the ServerWorks Grand Champion
chipset used for P4-Xeon machines

PR: kern/38894
Tested-by: "Marc G. Fournier" <scrappy@hub.org>
Submitted-by: Mark Tinguely (partially)
2002-07-19 18:35:08 +00:00
Poul-Henning Kamp
61658cf6a1 Add initialization code for the AMD Elan sc520 which maps the MMCR
into KVM and sets the i8254 frequency to the correct value.
2002-07-18 12:56:54 +00:00
Poul-Henning Kamp
3ae87b7ec6 Add an entry for the AMD Elan SC520 hostbridge. I do not belive we can
identify this gadget on the CPUID result alone, so I intend to activate
the necessary magic (i8254 frequency for instance) for it based on the
precense of the on-chip host to PCI bridge.
2002-07-18 10:57:20 +00:00
Warner Losh
e5d7e9c76c Fix a PNPID in a comment
Submitted by: David Xu
2002-04-24 15:22:53 +00:00
Nicolas Souchu
c17d43407f Major rework of the iicbus/smbus framework:
- VIA chipset SMBus controllers added
	- alpm driver updated
	- Support for dynamic modules added
	- bktr FreeBSD smbus updated but not tested
	- cleanup
2002-03-23 15:49:15 +00:00
Murray Stokely
b0ae3ab3fe Add identification string for AMD-761 host to PCI bridge.
PR:	kern/32255
2001-12-10 09:27:00 +00:00
Peter Wemm
573be82757 Detect a certain type of PCIBIOS brain damage. For some reason,
some bios vendors took it apon themselves to "censor" the
host->pci bridges from PCIBIOS callers, even when the caller
explicitly asks for them.  This includes certain Compaq machines
(eg: DL360) and some laptops.

If we detect this, shut down pcibios and revert to using IO
port bashing.

Under -current, apcica does a better job anyway.
2001-08-21 03:10:55 +00:00
Mike Smith
bb0d0a8efc Next phase in the PCI subsystem cleanup.
- Move PCI core code to dev/pci.
 - Split bridge code out into separate modules.
 - Remove the descriptive strings from the bridge drivers.  If you
   want to know what a device is, use pciconf.  Add support for
   broadly identifying devices based on class/subclass, and for
   parsing a preloaded device identification database so that if
   you want to waste the memory, you can identify *anything* we know
   about.
 - Remove machine-dependant code from the core PCI code.  APIC interrupt
   mapping is performed by shadowing the intline register in machine-
   dependant code.
 - Bring interrupt routing support to the Alpha
   (although many platforms don't yet support routing or mapping
   interrupts entirely correctly).  This resulted in spamming
   <sys/bus.h> into more places than it really should have gone.
 - Put sys/dev on the kernel/modules include path.  This avoids
   having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
Mike Smith
e9ca98b28f Hack to work around a probe which will lock up at least some i450GX-based
systems.

From the PR:

 When 'probe.slot' is PCI_SLOTMAX (== 31) and 'probe.func' is 7,
 call to 'pci_cfgread()' here and machine suddenly hangs up.
 I don't know why...  (or 450GX chipset's bug?)

PR:		i386/20379
Submitted by:	Masayuki FUKUI <fukui@sonic.nm.fujitsu.co.jp>
2000-11-08 11:25:15 +00:00
Andrey A. Chernov
c07f6a2dd1 Return -10000 in pci_hostb_probe to allow agp driver (disabled otherwise) 2000-10-20 15:40:05 +00:00
Andrey A. Chernov
da0f52e1ea Add i815 Host to Hub 2000-10-20 15:14:51 +00:00
Warner Losh
54c9005faf Add the ability to use the $PIR table in the BIOS to route interrupts
on demand.

Submitted by: msmith
2000-10-16 07:25:08 +00:00
Alan Cox
e0284d2eb1 Change the text for the ServerWorks north bridge chips. RCC is now
officially listed as ServerWorks by www.pcisig.com.
2000-10-14 23:45:09 +00:00
Mike Smith
3c3134d3a0 When testing for PCI bus overlap with another enumerator, make sure we
check for the right bus number.  This is still not quite right, but
fixes things for multi-bus machines again.

Submitted by:	tegge
2000-10-11 23:03:11 +00:00
Mike Smith
03de26e0d0 Only attach "legacy" PCI busses if none have been attached via any other
method.
2000-10-09 00:44:41 +00:00
Mike Smith
12a02d6efd Move the i386 PCI attachment code out of i386/isa back into i386/pci.
Split out the configuration space access primitives, as these are needed
elsewhere as well.
2000-10-02 07:11:13 +00:00
Peter Wemm
b6c8407840 Get out the roto-rooter and clean up the abuse of nexus ivars by the
i386/isa/pcibus.c.  This gets -current running again on multiple host->pci
machines after the most recent nexus commits.  I had discussed this with
Mike Smith, but ended up doing it slightly differently to what we
discussed as it turned out cleaner this way.  Mike was suggesting creating
a new resource (SYS_RES_PCIBUS) or something and using *_[gs]et_resource(),
but IMHO that wasn't ideal as SYS_RES_* is meant to be a global platform
property, not a quirk of a given implementation.  This does use the ivar
methods but does so properly.  It also now prints the physical pci bus that
a host->pci bridge (pcib) corresponds to.
2000-09-28 00:37:32 +00:00
Peter Wemm
4d8ea19f7c Catch a few more bogosities in certain chipsets before they mess us up.
Some have dual host->PCI bridges for the same logical pci bus (!), eg:
some of the RCC chipsets.  This is a 32/64 bit 33/66MHz and dual pci
voltage motherboard so persumably there are electical or signalling
differences but they are otherwise the same logical bus.
The new PCI probe code however was getting somewhat upset about it and
ended up creating two pci bridges to the same logical bus, which caused
devices on that logical bus to appear and be probed twice.

The ACPI data on this box correctly identifies this stuff, so bring on
ACPI! :-)
2000-09-05 00:53:34 +00:00
Peter Wemm
280b4748af Take a shot at fixing multiple pci busses on i386.
pcib_set_bus() cannot be used on the new child because it is
meant to be used on the *pci* device (it looks at the parent internally)
not the pcib being added.  Bite the bullet and use ivars for the bus
number to avoid any doubts about whether the softc is consistant between
probe and attach.  This should not break the Alpha code.
2000-08-31 23:11:35 +00:00
Doug Rabson
21c3015a24 * Completely rewrite the alpha busspace to hide the implementation from
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
  which call busspace.
* Rework pci config accesses to route through the pcib device instead of
  calling a MD function directly.

With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
Mike Smith
2a50a6d730 Add PnP probe methods to some common AT hardware drivers. In each case,
the PnP probe is merely a stub as we make assumptions about some of this
hardware before we have probed it.

Since these devices (with the exception of the speaker) are 'standard',
suppress output in the !bootverbose case to clean up the probe messages
somewhat.
2000-06-23 07:44:33 +00:00
Jun Kuriyama
569e965893 Add OPTi 82C700 chipset.
Submitted by:	sanpei@sanpei.org
PR:		kern/18155 (part of)
2000-05-24 09:03:30 +00:00
Jun Kuriyama
3cc13eb5b1 Add 440MX chipset.
Submitted by:	YOSHIMURA Hideaki <hideakiy@cs-tokyo01.chuosystem.co.jp>
References:	[bsd-nomads:13764]
2000-05-24 02:24:38 +00:00
Mike Smith
ac9b3dacb2 Don't assume that the PCI BIOS is going to clear the unused bits in %ecx
when it returns.
2000-05-04 17:44:55 +00:00
Mike Smith
300451c472 Some more i386-only BIOS-friendliness:
- Add support for using the PCI BIOS functions for configuration space
   accesses, and make this the default.

 - Make PNPBIOS the default (obsoletes the PNPBIOS config option).

 - Add two new boot-time tunables to disable each of the above.
2000-04-16 20:48:33 +00:00