currently build, they should be kept. [1]
Unbreak their makefiles by removing the support for the long gone
DEFAULT_THREAD_LIB knob. (Allows the tools/make_libdeps.sh script
to succeed.)
According to: davidxu and deischen [1]
MFC after: 3 days
o Eliminate IA64_PHYS_TO_RR6 and change all places where the macro is used
by calling either bus_space_map() or pmap_mapdev().
o Implement bus_space_map() in terms of pmap_mapdev() and implement
bus_space_unmap() in terms of pmap_unmapdev().
o Have ia64_pib hold the uncached virtual address of the processor interrupt
block throughout the kernel's life and access the elements of the PIB
through this structure pointer.
This is a non-functional change with the exception of using ia64_ld1() and
ia64_st8() to write to the PIB. We were still using assignments, for which
the compiler generates semaphore reads -- which cause undefined behaviour
for uncacheable memory. Note also that the memory barriers in ipi_send() are
critical for proper functioning.
With all the mapping of uncached memory done by pmap_mapdev(), we can keep
track of the translations and wire them in the CPU. This then eliminates
the need to reserve a whole region for uncached I/O and it eliminates
translation traps for device I/O accesses.
incomplete as some info doesn't really belong to the structs where it is
defined.
Submitted by: Pedro F. Giffuni <giffunip tutopia com>
Reviewed by: bde
MFC after: 2 weeks
With FBS enabled, we have no idea what command caused timeout.
Implement same logic as in siis(4) - wait for other commands
complete or timeout and then give some more time.
- fix sign-compare issues.
- ANSIfy a couple of functions.
- Remove more duplicate #includes.
- Memory leak found by Coverity on NetBSD.
Submitted by: Pedro F. Giffuni <giffunip tutopia com>
Reviewed by: bde
MFC after: 2 weeks
- C99 initializers.
- Change the default volume label from "NO NAME" to "NO_NAME".
- Set OEM String to "BSD4.4 " following the unnamed spacing convention
in that other OS that suggests "MSWIN4.1"
Also, David Naylor's changes for Clang, mostly changing the signess
of constants.
Submitted by: Pedro F. Giffuni <giffunip tutopia com>
Clang fixes by: David Naylor <naylor.b.david gmail com>
Reviewed by: bde (with some disagreement about Clang issues)
MFC after: 2 weeks
According to the last POSIX specification that contained <sys/timeb.h>,
this header should also typedef time_t properly. Also add a proper
comment to the final #endif.
caching code for IPv6 by fixing a typo that used the incorrect variable.
It also fixes the indentation of the statement above it.
Reported by: simon AT comsys.ntu-kpi.kiev.ua
MFC after: 5 days
scalable shared memory node, which is used in large UltraSPARC III based
machines to group snooping-coherency domains together, like schizo(4) to
be treated like nexus(4) children.
to the exclusion lists as the CPU nodes aren't handled as regular devices
either. Also add the pseudo-devices found in Sun Fire V1280.
- Allow nexus_attach() and nexus_alloc_resource() to be used by drivers
derived from nexus(4) for subordinate busses.
- Don't add the zero-sized memory resources of glue devices to the resource
lists.
root nexus device for the CPUs as starting with UltraSPARC IV the 'cpu'
nodes hang off of from 'cmp' (chip multi-threading processor) or 'core'
or combinations thereof. Also in large UltraSPARC III based machines
the 'cpu' nodes hang off of 'ssm' (scalable shared memory) nodes which
group snooping-coherency domains together instead of directly from the
nexus.
It would be great if we could use newbus to deal with the different ways
the 'cpu' devices can hang off of pseudo ones but unfortunately both
cpu_mp_setmaxid() and sparc64_init() have to work prior to regular device
probing.
- Add support for UltraSPARC IV and IV+ CPUs. Due to the fact that these
are multi-core each CPU has two Fireplane config registers and thus the
module/target ID has to be determined differently so the one specific
to a certain core is used. Similarly, starting with UltraSPARC IV the
individual cores use a different property in the OFW device tree to
indicate the CPU/core ID as it no longer is in coincidence with the
shared slot/socket ID.
This involves changing the MD KTR code to not directly read the UPA
module ID either. We use the MID stored in the per-CPU data instead of
calling cpu_get_mid() as a replacement in order prevent clobbering any
registers as side-effect in the assembler version. This requires CATR()
invocations from mp_startup() prior to mapping the per-CPU pages to be
removed though.
While at it additionally distinguish between CPUs with Fireplane and
JBus interconnects as these also use slightly different sizes for the
JBus/agent/module/target IDs.
- Make sparc64_shutdown_final() static as it's not used outside of
machdep.c.
