5 Commits

Author SHA1 Message Date
manu
f5f9058cca ofw_spi: Parse property for the SPI mode and CS polarity.
As cs is stored in a uint32_t, use the last bit to store the
active high flag as it's unlikely that we will have that much CS.

Reviewed by:	loos
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D8614
2016-12-18 14:54:20 +00:00
manu
037f67880c CS ivar is uint32_t, not int.
MFC after:	3 days
2016-12-12 18:36:46 +00:00
andrew
99881c494f Stop including fdt_common.h from the arm code when it's unneeded.
Sponsored by:	ABT Systems Ltd
2016-11-14 11:41:22 +00:00
loos
2a90b26b16 Bump up the read and write timeouts. The old value was too small for low
speed transfers.

Sponsored by:	Rubicon Communications (Netgate)
2016-03-30 16:26:00 +00:00
loos
7fa93ae37c Add the SPI driver for am335x.
This driver works in PIO mode for now, interrupts are available only when
FIFO is enabled.  The FIFO cannot be used with arbitrary sizes which defeat
its general use.

At some point we can add DMA transfers where the FIFO can be more useful.

Tested on uBMC (microBMC) and BBB.

Sponsored by:	Rubicon Communications (Netgate)
2016-03-29 19:11:04 +00:00