6406 Commits

Author SHA1 Message Date
jkim
95442a8d40 Re-initialize model-specific MSRs when we resume CPUs.
MFC after:	1 week
2012-03-30 17:03:06 +00:00
jkim
6cd4f25011 Work around Erratum 721 for AMD Family 10h and 12h processors.
"Under a highly specific and detailed set of internal timing conditions,
the processor may incorrectly update the stack pointer after a long series
of push and/or near-call instructions, or a long series of pop and/or
near-return instructions.  The processor must be in 64-bit mode for this
erratum to occur."

MFC after:	3 days
2012-03-30 16:32:41 +00:00
jhb
876e74a14e Use a more proper fix for enabling HT MSI mapping windows on Host-PCI
bridges.  Rather than blindly enabling the windows on all of them, only
enable the window when an MSI interrupt is enabled for a device behind
the bridge, similar to what already happens for HT PCI-PCI bridges.

To implement this, each x86 Host-PCI bridge driver has to be able to
locate it's actual backing device on bus 0.  For ACPI, use the _ADR
method to find the slot and function of the device.  For the non-ACPI
case, the legacy(4) driver already scans bus 0 looking for Host-PCI
bridge devices.  Now it saves the slot and function of each bridge that
it finds as ivars that the Host-PCI bridge driver can then use in its
pcib_map_msi() method.

This fixes machines where non-MSI interrupts were broken by the previous
round of HT MSI changes.

Tested by:	bapt
MFC after:	1 week
2012-03-29 19:03:22 +00:00
jhb
98fa920cd5 - Rename VM_MEMATTR_UNCACHED to VM_MEMATTR_WEAK_UNCACHEABLE on x86 to
be less ambiguous and more clearly identify what it means.  This
  attribute is what Intel refers to as UC-, and it's only difference
  relative to normal UC memory is that a WC MTRR will override a UC-
  PAT entry causing the memory to be treated as WC, whereas a UC PAT
  entry will always override the MTRR.
- Remove the VM_MEMATTR_UNCACHED alias from powerpc.
2012-03-29 16:51:22 +00:00
fabient
5edfb77dd3 Add software PMC support.
New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools like pmcstat(8).

Simultaneous usage of software PMC and hardware PMC is possible, for example
looking at the lock acquire failure, page fault while sampling on
instructions.

Sponsored by: NETASQ
MFC after:	1 month
2012-03-28 20:58:30 +00:00
alc
ee76f4b5b2 Disable detailed PV entry accounting by default. Add a config option
to enable it.

MFC after:	1 week
2012-03-24 19:43:49 +00:00
marius
764884b271 Add cas(4), gem(4) and hme(4) to x86 GENERICs as suggested by netchild@ in
<20120222095239.Horde.0hpYHJjmRSRPRKzXsoFRbYk@webmail.leidinger.net>.
According to some private emails received, it apparently is not unpopular
to use at least Quad GigaSwift cards driven by cas(4) in x86 machines.

MFC after:	1 week
2012-03-24 18:08:28 +00:00
joel
5dd021f67f Add snd_cmi, snd_csa and snd_emu10kx to GENERIC on i386 and amd64.
The GPL infected parts which were blocking the inclusion of snd_csa
and snd_emu10kx in GENERIC have recently been removed from the tree.
I'm also adding snd_cmi to GENERIC, which I originally intended to
add when we enabled sound support by default.

Discussed with:	jhb, pfg, Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
Approved by:	jhb
2012-03-22 16:19:04 +00:00
alc
e02fd6b842 Handle spurious page faults that may occur in no-fault sections of the
kernel.

When access restrictions are added to a page table entry, we flush the
corresponding virtual address mapping from the TLB.  In contrast, when
access restrictions are removed from a page table entry, we do not
flush the virtual address mapping from the TLB.  This is exactly as
recommended in AMD's documentation.  In effect, when access
restrictions are removed from a page table entry, AMD's MMUs will
transparently refresh a stale TLB entry.  In short, this saves us from
having to perform potentially costly TLB flushes.  In contrast,
Intel's MMUs are allowed to generate a spurious page fault based upon
the stale TLB entry.  Usually, such spurious page faults are handled
by vm_fault() without incident.  However, when we are executing
no-fault sections of the kernel, we are not allowed to execute
vm_fault().  This change introduces special-case handling for spurious
page faults that occur in no-fault sections of the kernel.

In collaboration with:	kib
Tested by:		gibbs (an earlier version)

I would also like to acknowledge Hiroki Sato's assistance in
diagnosing this problem.

MFC after:	1 week
2012-03-22 04:52:51 +00:00
alc
1c754fb497 Change pv_entry_count to a long. During the lifetime of FreeBSD 10.x,
physical memory sizes at the high-end will likely reach a point that
the number of pv entries could overflow an int.

Submitted by:	kib
2012-03-22 04:40:22 +00:00
ed
619ab2327e Remove pty(4) from our kernel configurations.
As of FreeBSD 8, this driver should not be used. Applications that use
posix_openpt(2) and openpty(3) use the pts(4) that is built into the
kernel unconditionally. If it turns out high profile depend on the
pty(4) module anyway, I'd rather get those fixed. So please report any
issues to me.

The pty(4) module is still available as a kernel module of course, so a
simple `kldload pty' can be used to run old-style pseudo-terminals.
2012-03-21 08:38:42 +00:00
alc
3c3b82e681 Eliminate vm.pmap.shpgperproc and vm.pmap.pv_entry_max because they no
longer serve any purpose.  Prior to r157446, they served a purpose
because there was a fixed amount of kernel virtual address space
reserved for pv entries at boot time.  However, since that change pv
entries are accessed through the direct map, and so there is no limit
imposed by a fixed amount of kernel virtual address space.

Fix a couple of nearby style issues.

Reviewed by:	jhb, kib
MFC after:	1 week
2012-03-21 04:00:58 +00:00
jkim
9807567995 Merge ACPICA 20120320. 2012-03-20 21:37:52 +00:00
jkim
107d21a0f4 Fix another witness panic. We cannot enter critical section at all because
AcpiEnterSleepState() executes (optional) _GTS method since ACPICA 20120215
(r231844).  To evaluate the method, we need malloc(9), which may sleep.

Reported by:	bschmidt
MFC after:	3 days
2012-03-20 20:37:23 +00:00
tijl
fee85d364e Copy amd64 sysarch.h to x86 and merge with i386 sysarch.h. Replace
amd64/i386/pc98 sysarch.h with stubs.
2012-03-19 21:57:31 +00:00
jkim
6b5199d29b Fix a witness panic introduced in r231797.
Reported by:	bschmidt
Reviewed by:	jhb
Pointy hat to:	jkim
MFC after:	3 days
2012-03-19 21:47:50 +00:00
tijl
42f636fdcd Copy i386 specialreg.h to x86 and merge with amd64 specialreg.h. Replace
amd64/i386/pc98 specialreg.h with stubs.
2012-03-19 21:34:11 +00:00
tijl
ea1f38e564 Copy i386 psl.h to x86 and replace amd64/i386/pc98 psl.h with stubs. 2012-03-19 21:29:57 +00:00
tijl
2a126f1975 Move userland bits (and some common kernel bits) from amd64 and i386
segments.h to a new x86 segments.h.

Add __packed attribute to some structs (just to be sure).
Also make it clear that i386 GDT and LDT entries are used in ia64 code.
2012-03-19 21:24:50 +00:00
kib
b100959d0a Re-apply r233122 erronously reverted in r233168.
Submitted by:	 jhb
Pointy hat to:	 kib
MFC after: 2 weeks
2012-03-19 15:50:14 +00:00
kib
151deea148 If we ever allow for managed fictitious pages, the pages shall be
excluded from superpage promotions.  At least one of the reason is
that pv_table is sized for non-fictitious pages only.

Consistently check for the page to be non-fictitious before accesing
superpage pv list.

Sponsored by:	The FreeBSD Foundation
Reviewed by:	alc
MFC after:	2 weeks
2012-03-19 09:34:22 +00:00
tijl
35c7447060 Eliminate ia32_reg.h by moving its contents to x86 and ia64 reg.h.
Reviewed by:	kib
2012-03-18 19:12:11 +00:00
tijl
2bf580ea66 Copy i386 reg.h to x86 and merge with amd64 reg.h. Replace i386/amd64/pc98
reg.h with stubs.

The tREGISTER macros are only made visible on i386. These macros are
deprecated and should not be available on amd64.

The i386 and amd64 versions of struct reg have been renamed to struct
__reg32 and struct __reg64. During compilation either __reg32 or __reg64
is defined as reg depending on the machine architecture. On amd64 the i386
struct is also available as struct reg32 which is used in COMPAT_FREEBSD32
code.

Most of compat/ia32/ia32_reg.h is now IA64 only.

Reviewed by:	kib (previous version)
2012-03-18 19:06:38 +00:00
tijl
f36691a4af Use exact width integer types in amd64/i386 reg.h to prepare for a merge.
The only real change is replacing long with int on i386.
2012-03-18 18:44:42 +00:00
alc
9f2db48abf Style fix to pmap_protect().
Submitted by:	bde
2012-03-18 17:41:54 +00:00
alc
eb494d678d With the changes over the past year to how accesses to the page's dirty
field are synchronized, there is no need for pmap_protect() to acquire
the page queues lock unless it is going to access the pv lists.

Reviewed by:	kib
2012-03-17 22:04:58 +00:00
tijl
9c671fcaca Move userland bits of i386 npx.h and amd64 fpu.h to x86 fpu.h.
Remove FPU types from compat/ia32/ia32_reg.h that are no longer needed.
Create machine/npx.h on amd64 to allow compiling i386 code that uses
this header.

The original npx.h and fpu.h define struct envxmm differently. Both
definitions have been included in the new x86 header as struct __envxmm32
and struct __envxmm64. During compilation either __envxmm32 or __envxmm64
is defined as envxmm depending on machine architecture. On amd64 the i386
struct is also available as struct envxmm32.

Reviewed by:	kib
2012-03-16 20:24:30 +00:00
alc
0500a4c033 Simplify the error checking in one branch of trap_pfault() and update
the nearby comment.

Add missing whitespace to a return statement in trap_pfault().

Submitted by:	kib [2]
2012-03-12 00:47:13 +00:00
netchild
2e5021dbc5 regen 2012-03-10 23:11:21 +00:00
netchild
3394e725cf - add comments to syscalls.master and linux(32)_dummy about which linux
kernel version introduced the sysctl (based upon a linux man-page)
- add comments to sscalls.master regarding some names of sysctls which are
  different than the linux-names (based upon the linux unistd.h)
- add some dummy sysctls
- name an unimplemented sysctl

MFC after:	1 month
2012-03-10 23:10:18 +00:00
jhb
825e868ea8 Move i386's intr_machdep.c to the x86 tree and share it with amd64. 2012-03-09 20:43:29 +00:00
emaste
bd54a55c5a Remove duplicated license text. 2012-03-06 21:13:12 +00:00
attilio
9906b913d9 Disable the option VFS_ALLOW_NONMPSAFE by default on all the supported
platforms.
This will make every attempt to mount a non-mpsafe filesystem to the
kernel forbidden, unless it is expressely compiled with
VFS_ALLOW_NONMPSAFE option.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.
2012-03-06 20:01:25 +00:00
bz
606ca3f4b7 Provide wbwd(4), a driver for the watchdog timer found on various
Winbond Super I/O chips.

With minor efforts it should be possible the extend the driver to support
further chips/revisions available from Winbond.  In the simplest case
only new IDs need to be added, while different chipsets might require
their own function to enter extended function mode, etc.

Sponsored by:	Sandvine Incorporated ULC (in 2011)
Reviewed by:	emaste, brueffer
MFC after:	2 weeks
2012-03-06 18:44:52 +00:00
jkim
2aa0082431 Fix few style nits. 2012-03-05 18:47:42 +00:00
rmh
69f995371f Exclude USB drivers (except umass and ukbd) from main kernel image on i386
and amd64.

Reviewed by:	hselasky, arch, usb
Approved by:	kib (mentor)
2012-03-04 21:31:13 +00:00
tijl
ab137477da Copy amd64 ptrace.h to x86 and merge with i386 ptrace.h. Replace
amd64/i386/pc98 ptrace.h with stubs.

For amd64 PT_GETXSTATE and PT_SETXSTATE have been redefined to match the
i386 values. The old values are still supported but should no longer be
used.

Reviewed by:	kib
2012-03-04 20:24:28 +00:00
tijl
bb4b86d0ab Copy amd64 trap.h to x86 and replace amd64/i386/pc98 trap.h with stubs. 2012-03-04 14:12:57 +00:00
tijl
28848902c7 Copy amd64 float.h to x86 and merge with i386 float.h. Replace
amd64/i386/pc98 float.h with stubs.
2012-03-04 14:00:32 +00:00
jkim
bf6ad4fe67 Add VESA option to GENERIC for amd64 and i386.
MFC after:	1 month
2012-03-03 00:11:46 +00:00
tijl
2db0395534 Copy amd64 stdarg.h to x86 and replace amd64/i386/pc98 stdarg.h with stubs. 2012-02-28 22:30:58 +00:00
tijl
e5cc7570cf Copy amd64 setjmp.h to x86 and replace amd64/i386/pc98 setjmp.h with stubs. 2012-02-28 22:17:52 +00:00
tijl
bfd7a07500 Copy amd64 endian.h to x86 and merge with i386 endian.h. Replace
amd64/i386/pc98 endian.h with stubs.

In __bswap64_const(x) the conflict between 0xffUL and 0xffULL has been
resolved by reimplementing the macro in terms of __bswap32(x). As a side
effect __bswap64_var(x) is now implemented using two bswap instructions on
i386 and should be much faster. __bswap32_const(x) has been reimplemented
in terms of __bswap16(x) for consistency.
2012-02-28 19:39:54 +00:00
tijl
738f5859fb Copy amd64 _stdint.h to x86 and merge with i386 _stdint.h. Replace
amd64/i386/pc98 _stdint.h with stubs.
2012-02-28 18:38:33 +00:00
tijl
86b4719ed5 Copy amd64 _limits.h to x86 and merge with i386 _limits.h. Replace
amd64/i386/pc98 _limits.h with stubs.
2012-02-28 18:24:28 +00:00
tijl
3b29ed2286 Copy amd64 _types.h to x86 and merge with i386 _types.h. Replace existing
amd64/i386/pc98 _types.h with stubs.
2012-02-28 18:15:28 +00:00
jhb
8e4f58c4d2 Resort the IDT_DTRACE_RET constant after it was changed to be less than
IDT_SYSCALL.
2012-02-27 17:29:37 +00:00
jhb
f436893eac Correct function prototype for read_rflags(). 2012-02-27 17:28:47 +00:00
jhb
29b46a1275 Update incorrect comment. 2012-02-27 17:28:22 +00:00
jkim
faa9b15d4e Refine r231791. Install the resume event handler unconditionally. 2012-02-16 22:28:17 +00:00