1069 Commits

Author SHA1 Message Date
alc
c380417937 - pmap_kenter_temporary() is unused by machine-independent code. Therefore,
move its declaration to the machine-dependent header file on those
   machines that use it.  In principle, only i386 should have it.
   Alpha and AMD64 should use their direct virtual-to-physical mapping.
 - Remove pmap_kenter_temporary() from ia64.  It is unused.  Approved
   by: marcel@
2004-04-10 22:41:46 +00:00
peter
b035268c4a MFi386: move rss() from db_interface.c to cpufunc.h 2004-04-07 00:41:05 +00:00
imp
ceab5f79a3 Remove advertising clause from University of California Regent's license,
per letter dated July 22, 1999 and email from Peter Wemm.

Approved by: core, peter
2004-04-05 23:55:14 +00:00
imp
21f7c26600 Remove advertising clause from University of California Regent's license,
per letter dated July 22, 1999.

Approved by: core
2004-04-05 21:29:41 +00:00
alc
d74988558f Remove ptmmap and ptvmmap. They are unused on amd64. 2004-04-03 20:53:50 +00:00
alc
8294bebe0a - Add an optimized page copy function for use by pmap_copy_page(). It is
roughly four times faster than bcopy() for uncached pages.
 - Sort the function prototypes in md_var.h.
2004-03-31 02:03:49 +00:00
marcel
7e4265388d Introduce the cpumask_t type. The purpose of the type is to create a
level of abstraction for any and all CPU mask and CPU bitmap variables
so that platforms have the ability to break free from the hard limit
of 32 CPUs, simply because we don't have more bits in an u_int. Note
that the type is not supposed to solve massive parallelism, where
the number of CPUs can be larger than the width of the widest integral
type. As such, cpumask_t is not supposed to be a compound type. If
such would be necessary in the future, we can deal with the issues
then and there. For now, it can be assumed that the type is integral
and unsigned.

With this commit, all MD definitions start off as u_int. This allows
us to phase-in cpumask_t at our leasure without breaking anything.
Once cpumask_t is used consistently, platforms can switch to wider
(or smaller) types if such would be beneficial (or not; whatever :-)

Compile-tested on: i386
2004-03-20 20:41:40 +00:00
peter
43cfb3a55f Re-kill ispcvt on amd64 - rc.d/syscons was fixed ages ago. 2004-03-13 22:18:34 +00:00
peter
19c6ef7d3a Move the non-MD machine/dvcfg.h and machine/physio_proc.h to a common
MI area before they proliferate more.
2004-03-13 19:46:27 +00:00
peter
b971aaae92 MFi386: nuke pci_cfgintr 2004-03-13 19:19:13 +00:00
bde
7bc1e8430f Don't implement anything in the ffs family in <machine/cpufunc.h>
in the non-_KERNEL case.  This "fixes" applications that include
this "kernel-only" header and also include <strings.h> (or get
<strings.h> via the default _BSD_VISIBLE pollution in <string.h>.
In C++ there was a fatal error: the declaration specifies C linkage
but the implementation gives C++ linkage.  In C there was only a
static/extern mismatch if the headers were included in a certain order
order, and a partially redundant declaration for all include orders;
gcc emits incomplete or wrong diagnostics for these, but only for
compiling with -Wsystem-headers and certain other warning options, so
the problem was usually not seen for C.

Ports breakage reported by:	kris
2004-03-11 13:38:54 +00:00
peter
d2aca56c04 MFi386: re-sort non-gcc function prototypes, trim includes 2004-03-08 00:24:15 +00:00
alc
d1279ddf19 Remove unused declarations. (Some time ago, these variables became fields
of vm/vm.h's struct kva_md_info.)
2004-03-07 07:13:15 +00:00
le
d23ba57557 Fix syntax errors and wrong function prototypes in several MD header
files when using non-GNUC compilers.

PR:             kern/58515
Submitted by:   Stefan Farfeleder <stefan@fafoe.narf.at>
Approved by:    grog (mentor), obrien
2004-03-05 09:19:59 +00:00
obrien
c47306ec77 AMD64 versions. 2004-03-03 07:00:48 +00:00
peter
1f9d5a9d5f Re-add user_dbreg_trap() for debug register support 2004-01-29 00:05:03 +00:00
peter
57db6c4451 We can simplify a lot of things now that we don't have to worry about
hardware bugs on external 386 cpus and now that we can depend on SSE.
2004-01-28 23:55:58 +00:00
peter
5e45c69f41 Add dbreg struct definitions for /proc/*/dbregs and a place to store the
registers in the pcb
2004-01-28 23:54:31 +00:00
peter
9ba1ee132d Re-add debug register functions 2004-01-28 23:53:04 +00:00
peter
ecb3754972 MFi386: mp_topology(). 2004-01-28 23:51:16 +00:00
peter
3383d7b6d7 MFi386: add THERMTRIP msr values 2004-01-28 23:47:22 +00:00
phk
f1ded671b0 remove elan_mmcr, I'm not sure I understand what it did here in the
first place.
2004-01-17 13:13:48 +00:00
nectar
11f80dcf0d Provide sysarch(2) prototypes in the MD sysarch.h headers. While I'm
at it, use the ANSI C generic pointer type for the second argument,
thus matching the documentation.

Remove the now extraneous (and now conflicting) function declarations
in various libc sources.  Remove now unnecessary casts.

Reviewed by:	bde
2004-01-09 16:52:09 +00:00
nectar
caf374ec70 Remove `static' prototype from header file. 2004-01-06 20:36:21 +00:00
peter
daf42805ba GC the unused <machine/kse.h> file. 2003-12-24 00:51:30 +00:00
alc
4c2ac4ecef Since we have additional kernel virtual address space, allow the buffer
cache to grow to 400M bytes.
2003-12-20 20:03:10 +00:00
peter
c330930b3b MFi386: remove APIC_IRQ* defines that are no longer used. 2003-12-11 02:48:25 +00:00
obrien
1bf6892caf Add just enough of i386/include/pcvt_ioctl.h to amd64/include/pcvt_ioctl.h
such that 'ispcvt' can build.  Unforunately 'ispcvt' is needed in order for
/etc/rc.d/syscons to run.  This fixes the bug where I could not get my
keymap effective at boot.
2003-12-10 02:49:17 +00:00
alc
e1402f3305 Increase VM_KMEM_SIZE_MAX from 200MB to 400MB.
Discussed with:	peter
2003-12-07 04:51:04 +00:00
peter
a2b247f294 Reconfigure the runq macros to use the 64 bit ffs/bsf routines instead
of doing a loop and taking two 32 bit passes at the runqueue bits.  All
the 64 bit platforms should probably do this since there are 64 run queues.

Approved by:  re (scottl)
2003-12-06 23:24:18 +00:00
peter
955dcc87c1 Add 64 bit bsf*/ffs* routines. Have the ffs() inline use gcc's builtin
because it uses the better cmove instructions to avoid branches.
2003-12-06 23:22:43 +00:00
peter
e90d8494fb Kill the ASM versions of the mtx_lock_spin and friends. They were never
used on amd64, and were actually totally broken.  They had the wrong
calling conventions.  I believe the i386 versions are going away too.

Approved by:  re (scottl)
2003-12-06 23:17:18 +00:00
peter
9dc1f87f1b Revert some amd64 changes that cached curthread and converge back to the
i386 version.  The curthread special case in pcpu.h solves my complaint
about the verbose macro expansion in this case.  Note that the i386
version still has some OBE comments, I didn't re-add them back again.

Approved by:  re (scottl)
2003-12-06 23:13:22 +00:00
peter
aefda7ad56 Cosmetic and/or trivial sync up with i386.
Approved by:  re (rwatson)
2003-11-21 03:02:00 +00:00
peter
cc3418dd77 Argh! Followup to previous commit. I checked in the patch with an
unintended local change.  Change Xurthread back to curthread.
2003-11-20 23:49:28 +00:00
peter
855c7a569b Provide a streamlined '#define curthread __curthread()' for amd64 to avoid
the compiler having to parse and optimize the PCPU_GET(curthread) so often.
__curthread() is an inline optimized version of PCPU_GET(curthread) that
knows that pc_curthread is at offset zero in the pcpu struct.  Add a
CTASSERT() to catch any possible changes to this.  This accounts for
just over a 1% wall clock speedup for total kernel compile/link time,
and 20% compile time speedup on some specific files depending on which
compile options are used.

Approved by:  re (jhb)
2003-11-20 22:54:44 +00:00
peter
9dedda25aa Initial landing of SMP support for FreeBSD/amd64.
- This is heavily derived from John Baldwin's apic/pci cleanup on i386.
- I have completely rewritten or drastically cleaned up some other parts.
  (in particular, bootstrap)
- This is still a WIP.  It seems that there are some highly bogus bioses
  on nVidia nForce3-150 boards.  I can't stress how broken these boards
  are.  I have a workaround in mind, but right now the Asus SK8N is broken.
  The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed.
- Most of my testing has been with SCHED_ULE.  SCHED_4BSD works.
- the apic and acpi components are 'standard'.
- If you have an nVidia nForce3-150 board, you are stuck with 'device
  atpic' in addition, because they somehow managed to forget to connect the
  8254 timer to the apic, even though its in the same silicon!  ARGH!
  This directly violates the ACPI spec.
2003-11-17 08:58:16 +00:00
bde
efa9a611d9 Fixed pedantic warnings for statement-expressions using __extension__
and by not using a statement-expression for the non-expression
__PCPU_SET().
2003-11-17 04:40:58 +00:00
bde
59742d249e Fixed a pedantic syntax error (a stray semicolon at the end of
PCPU_MD_FIELDS).
2003-11-17 03:40:41 +00:00
alc
74614e7f63 - Modify alpha's sf_buf implementation to use the direct virtual-to-
physical mapping.
 - Move the sf_buf API to its own header file; make struct sf_buf's
   definition machine dependent.  In this commit, we remove an
   unnecessary field from struct sf_buf on the alpha, amd64, and ia64.
   Ultimately, we may eliminate struct sf_buf on those architecures
   except as an opaque pointer that references a vm page.
2003-11-16 06:11:26 +00:00
njl
1f1358c8e0 Add the pc_acpi_id PCPU member. The new acpi_cpu driver uses this to
dereference the softc.
2003-11-15 18:58:29 +00:00
peter
03bc446f3f Preemptively burn a bridges. The isa timer code is likely to be
replaced by the HPET timer at some point, so dont even make a release
with the aquire/release_timer0 functions.
2003-11-14 22:34:43 +00:00
peter
bd6ac1d6e5 Convert a couple of pointers to integers for source compatability with
amd64.
2003-11-14 22:23:30 +00:00
peter
e928c72a09 Whitespace nit (sorry, couldn't help it) 2003-11-14 22:21:30 +00:00
jhb
97b2405ad5 Shuffle the APIC interrupt vectors around a bit:
- Move the IPI and local APIC interrupt vectors up into the 0xf0 - 0xff
  range.  The pmap lazyfix IPI was reordered down next to the TLB
  shootdowns to avoid conflicting with the spurious interrupt vector.
- Move the base of APIC interrupts up 16 so that the first 16 APIC
  interrupts do not overlap the vectors used by the ATPIC.
- Remove bogus interrupt vector reservations for LINT[01].
- Now that 0xc0 - 0xef are available, use them for device interrupts.
  This increases the number of APIC device interrupts to 191.
- Increase the system-wide number of global interrupts to 191 to catch up
  to more APIC interrupts.

Requested by:	peter (2)
2003-11-14 19:10:13 +00:00
jhb
2b7e5ca79f Fix a typo. 2003-11-13 16:41:07 +00:00
jhb
9428d57b9b - Move manipulation of td_intr_nesting_level out of assembly interrupt
vector stubs and into the C functions they call.
- Move disabling and EOIing of interrupt sources out of PIC driver entry
  points and into intr_execute_handlers().  Intr_execute_handlers() only
  disables a source for an interrupt if it is a stray interrupt or has
  threaded handlers.  Sources with fast handlers no longer disable (mask)
  the source while executing the handlers.
- Move the setting of clkintr_pending into intr_execute_handlers() and set
  the variable for any interrupt source with a vector of 0.  (Should only
  be true for IRQ 0.)  This fixes clkintr_pending in the NO_MIXED_MODE
  case.
- Implement lapic_eoi() and use it to implement ioapic_eoi_source().
- Rename atpic_sched_ithd() to atpic_handle_intr() since it is used to
  handle all atpic interrupts and not just threaded ones.

Inspired by:	peter's changes to amd64 in p4 (1)
Requested by:	bde (2)
2003-11-12 18:13:57 +00:00
peter
2edc2f597b Update the graffiti. 2003-11-08 04:39:22 +00:00
peter
c32b37e0ed Switch from having a fpu "device" to something that is more like the
integrated part of the cpu core that it is.
2003-11-08 04:37:54 +00:00
peter
a2fff099b7 The great s/npx/fpu/gi 2003-11-08 03:33:38 +00:00