- stdio.h is needed for fprint()
- make memsize uint32_t to avoid errors due to overflow
- honor the *XPOLL flagg in NIOCREGIF requests
- mmap fails wit MAP_FAILED, not NULL.
MFC after: 3 days
In the .o file, this only changes some line numbers (head amd64) because
element 0 is no longer explicitly initialized.
This should make bugs like FreeBSD-SA-14:12.ktrace less likely.
Discussed with: des
MFC after: 1 week
SoC's registers base address may differ between boards
(0xf1000000 or 0xd0000000). Therefore, in order to use
the proper CPU Boot Address Redirect register during SMP
initialization in mptramp the real, physical address has
to be passed to mptramp based on the value from DT.
Reviewed by: gber
During Armada's platform_mp_start_ap(), mptramp code
is being copied to the specific physical location (0xffff0000).
Before r265694 the address to which the code should be copied
was equal to the address of mpentry routine that followed the
mptramp in locore.S. Now the mptramp end address should be
exported and used as a copy limit.
Reviewed by: gber
- Remove double buffering interrupt and isochronous traffic via the
transaction translator. It can be avoided because the DWC OTG will
always delay the start split transactions for interrupt and
isochronous traffic, but will not delay the complete split
transactions, if we set the odd frame bit correctly.
- Need to check the transfer cache field in the device done function
to be sure all allocated channels are freed and not the transfer first
one. This seems to resolve the control endpoint transfer type quirk
which is now removed.
- Make sure any received data upon TX is dumped else RX path will
stop.
- Transmit isochronous data before receiving isochronous data as a
means to optimise the TT schedule.
- Implement a simple TT bandwidth scheduler.
- Cleanup use of old "td->error" variable.
- On interrupt IN traffic via the transaction translator we simply
ignore missed transfer opportunities and silently retry the
transaction upon next available time slot.
MFC after: 3 days
trims to the device assumes the list is sorted. Don't apply the
optimization of not sorting the queue when we have SSDs to the
delete_queue, since it causes more discard traffic to the drive. While
one could argue that the higher levels should coalesce the trims,
that's not done today, so some optimization at this level is needed.
CR: https://phabric.freebsd.org/D142
"Terminus BSD Console" is a derivative of Terminus that is provided
by Mr. Dimitar Zhekov under the 2-clause BSD license for use by the FreeBSD vt(4) console.
Reviewed by: jhb
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
- Properly align temporary buffer to 32-bit.
- Add an extra parenthesis to make expression clear.
- Range check the association ID received from hardware.
MFC after: 1 week
A similar fix should be applied to vmxnet, ixgbe, igb, i40e.
(some of them previously reported by Michael Tuexen)
Drivers using if_transmit are correct, and so are most of the
other drivers that reassing if_transmit.
Among other things, this bug causes panics when using netmap emulation
on top of generic drivers.
Approved by: bryanv
MFC after: 3 days
Core i7 and Westmere processors, the uncore PMC subsystem is
completely different from the uncore PMC on smaller versions of CPUs.
Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs
are accessed.
The cores PMCs seems to be identical for non-EX and EX, according to
the SDM.
Reviewed by: davide, fabient
Sponsored by: The FreeBSD Foundation
MFC after: 2 weeks
- The R92S_TCR register is an 8-bit register. Don't access it like a
16-bit register.
- Disable parsing the delete station event, due to many false events.
- Ensure that there is only one transfer queue for each endpoint, so
that packets transmitted don't get out of order.
MFC after: 1 week
If you had a UFS2 FS that didn't have it's super block at SBLOCK_UFS2,
you'll end up corrupting your FS as the superblock is updated and written
to a different location...
makefs used to put the superblock at SBLOCK_UFS1 for UFS 2 FS's causing
this issue...
Reviewed by: silience from mckusick
MFC after: 1 week
selection. gethrtime() in our port updated with HZ rate, so unusable for
this specific purpose, completely draining benefit of multiple taskqueues.
MFC after: 2 weeks
(7-bit device address << 1), always leaving the room for the read/write bit.
This commit convert ti_i2c and revert r259127 on bcm2835_bsc to make them
compatible with 8-bit addresses. Previous to this commit an i2c device
would have different addresses depending on the controller it was attached
to (by example, when compared to any iicbb(4) based i2c controller), which
was a pretty annoying behavior.
Also, update the PMIC i2c address on beaglebone* DTS files to match the new
address scheme.
Now the userland utilities need to do the correct slave address shifting
(but it is going to work with any i2c controller on the system).
Discussed with: ian
MFC after: 2 weeks
The ti_i2c controller only works in the master mode and the i2c address
passed on iicbus_reset() is used to set the controller slave address when
operating as an i2c slave (which isn't currently supported).
When talking to a slave, the slave address is correctly provided to
ti_i2c_tranfer().
o Always init locks and cv ASAP.
o Initialize driver-independent parts even if driver probing fail.
o Allow to call vt_upgrade anytime, for later loaded drivers.
o New window flag VWF_READY, to track if window already initialized.
Other updates:
o Pass vd as a cookie for kbd_allocate.
o Do not blank window on driver replacement.
Tested by: hselasky (RPi), emaste(VGA, EFIFB, KMS), me
MFC after: 7 days
Sponsored by: The FreeBSD Foundation
