Commit Graph

2133 Commits

Author SHA1 Message Date
ken
15e9b1348e Fix the netback driver build for i386.
netback.c:	Add missing VM includes.

xen/xenvar.h,
xen/xenpmap.h:	Move some XENHVM macros from <machine/xen/xenpmap.h> to
		<machine/xen/xenvar.h> on i386 to match the amd64 headers.

conf/files:	Add netback to the build.

Submitted by:	jhb
MFC after:	3 days
2012-02-02 17:54:35 +00:00
kib
82e1b5ac86 Synchronize the struct sigcontext definitions on x86 with mcontext_t.
Pointed out by:	bde
MFC after:	1 month
2012-01-30 07:51:52 +00:00
das
9feb719605 Add C11 macros describing subnormal numbers to float.h.
Reviewed by:	bde
2012-01-23 06:36:41 +00:00
kib
361bfae5c2 Add support for the extended FPU states on amd64, both for native
64bit and 32bit ABIs.  As a side-effect, it enables AVX on capable
CPUs.

In particular:

- Query the CPU support for XSAVE, list of the supported extensions
  and the required size of FPU save area. The hw.use_xsave tunable is
  provided for disabling XSAVE, and hw.xsave_mask may be used to
  select the enabled extensions.

- Remove the FPU save area from PCB and dynamically allocate the
  (run-time sized) user save area on the top of the kernel stack,
  right above the PCB. Reorganize the thread0 PCB initialization to
  postpone it after BSP is queried for save area size.

- The dumppcb, stoppcbs and susppcbs now do not carry the FPU state as
  well. FPU state is only useful for suspend, where it is saved in
  dynamically allocated suspfpusave area.

- Use XSAVE and XRSTOR to save/restore FPU state, if supported and
  enabled.

- Define new mcontext_t flag _MC_HASFPXSTATE, indicating that
  mcontext_t has a valid pointer to out-of-struct extended FPU
  state. Signal handlers are supplied with stack-allocated fpu
  state. The sigreturn(2) and setcontext(2) syscall honour the flag,
  allowing the signal handlers to inspect and manipilate extended
  state in the interrupted context.

- The getcontext(2) never returns extended state, since there is no
  place in the fixed-sized mcontext_t to place variable-sized save
  area. And, since mcontext_t is embedded into ucontext_t, makes it
  impossible to fix in a reasonable way.  Instead of extending
  getcontext(2) syscall, provide a sysarch(2) facility to query
  extended FPU state.

- Add ptrace(2) support for getting and setting extended state; while
  there, implement missed PT_I386_{GET,SET}XMMREGS for 32bit binaries.

- Change fpu_kern KPI to not expose struct fpu_kern_ctx layout to
  consumers, making it opaque. Internally, struct fpu_kern_ctx now
  contains a space for the extended state. Convert in-kernel consumers
  of fpu_kern KPI both on i386 and amd64.

First version of the support for AVX was submitted by Tim Bird
<tim.bird am sony com> on behalf of Sony. This version was written
from scratch.

Tested by:	pho (previous version), Yamagi Burmeister <lists yamagi org>
MFC after:	1 month
2012-01-21 17:45:27 +00:00
kib
69f3e63a09 Add definitions for the FPU extended state header, legacy extended
state and AVX state.

MFC after:	1 week
2012-01-17 17:07:13 +00:00
kib
e94bd75cc5 Add definitions related to XCR0.
MFC after:	1 week
2012-01-17 07:23:43 +00:00
uqs
d61d88a310 Convert files to UTF-8 2012-01-15 13:23:18 +00:00
ed
3bad498373 Also import WEAK_ALIAS() from the MIPS code. 2012-01-05 08:51:06 +00:00
ed
29cd68a581 Add support for strong aliasing of symbols in i386 assembly.
This macro is a literal copy from the MIPS version of <machine/asm.h>.
2012-01-03 07:06:35 +00:00
kib
a1ca31e42c Make the comment in i386/include/ucontext.h identical to the one in
amd64/include/ucontext.h. The later is better worded.

Requested by:	deischen
MFC after:	3 days
2011-12-31 14:44:42 +00:00
ed
cb983d98e7 Replace __signed by signed.
The signed keyword is an integral part of the C syntax. There's no need
to use __signed.
2011-12-13 13:38:03 +00:00
alc
57f34640a0 Avoid the possibility of integer overflow in the calculation of
VM_KMEM_SIZE_MAX.  Specifically, if the user/kernel address space split
was changed such that the kernel address space was greater than or equal
to 2 GB, then overflow would occur.

PR:		161721
MFC after:	3 weeks
2011-12-10 18:42:00 +00:00
kib
d8e6287519 Attempt to improve formatting and content of several comments for
amd64 and i386 MD code.

Based on suggestions by:	bde
MFC after:	1 week
2011-11-09 18:25:50 +00:00
rstone
7513eaddcf Fix the DTrace pid return trap interrupt vector. Previously we were using
31, but that vector is reserved.

Without this fix, running dtrace -p <pid> would either cause the target
process to crash or the kernel to page fault.

Obtained from:	rpaulo
MFC after:	3days
2011-11-07 01:53:25 +00:00
das
28e8dea258 People porting FreeBSD to new architectures ought not have to
implement a deprecated FPU control interface in addition to the
standard one.  To make this clearer, further deprecate ieeefp.h
by not declaring the function prototypes except on architectures
that implement them already.

Currently i386 and amd64 implement the ieeefp.h interface for
compatibility, and for fp[gs]etprec(), which doesn't exist on
most other hardware.  Powerpc, sparc64, and ia64 partially implement
it and probably shouldn't, and other architectures don't implement it
at all.
2011-10-21 06:41:46 +00:00
kib
1134edae2b Remove unused define.
MFC after:	1 month
2011-10-07 16:09:44 +00:00
attilio
a73e834ebb Add the possibility to specify from kernel configs MAXCPU value.
This patch is going to help in cases like mips flavours where you
want a more granular support on MAXCPU.

No MFC is previewed for this patch.

Tested by:	pluknet
Approved by:	re (kib)
2011-07-19 00:37:24 +00:00
jkim
52539f62b4 Correct cpu_monitor() and cpu_mwait() for amd64. These instructions take
%rcx as "extensions" in long mode.  If any unused bit is set in %rcx, these
instructions cause general protection fault.  Fix style nits and synchronize
i386 with amd64.
2011-07-05 18:42:10 +00:00
jhb
83fca1d193 Move {amd64,i386}/pci/pci_bus.c and {amd64,i386}/include/pci_cfgreg.h to
the x86 tree.  The $PIR code is still only enabled on i386 and not amd64.
While here, make the qpi(4) driver on conditional on 'device pci'.
2011-06-22 21:04:13 +00:00
jhb
3fa22c485f Oops, missed these in 223424.
Reported by:	jkim
2011-06-22 18:48:07 +00:00
avg
74204e61b2 remove code for dynamic offlining/onlining of CPUs on x86
The code has definitely been broken for SCHED_ULE, which is a default
scheduler.  It may have been broken for SCHED_4BSD in more subtle ways,
e.g. with manually configured CPU affinities and for interrupt devilery
purposes.
We still provide a way to disable individual CPUs or all hyperthreading
"twin" CPUs before SMP startup.  See the UPDATING entry for details.

Interaction between building CPU topology and disabling CPUs still
remains fuzzy: topology is first built using all availble CPUs and then
the disabled CPUs should be "subtracted" from it.  That doesn't work
well if the resulting topology becomes non-uniform.

This work is done in cooperation with Attilio Rao who in addition to
reviewing also provided parts of code.

PR:		kern/145385
Discussed with:	gcooper, ambrisko, mdf, sbruno
Reviewed by:	attilio
Tested by:	pho, pluknet
X-MFC after:	never
2011-06-08 08:12:15 +00:00
attilio
ccbb37970b Reintroduce the lazypmap infrastructure and convert it to using
cpuset_t.

Requested by:	alc
2011-05-20 14:53:16 +00:00
attilio
6a2b7fdc52 MFC 2011-05-18 16:01:29 +00:00
attilio
9ff3491e67 MFC 2011-05-13 20:58:48 +00:00
attilio
d7cb9e4814 MFC 2011-05-09 18:53:13 +00:00
attilio
a0b51ba62f MFC 2011-05-06 22:45:33 +00:00
attilio
fe4de567b5 Commit the support for removing cpumask_t and replacing it directly with
cpuset_t objects.
That is going to offer the underlying support for a simple bump of
MAXCPU and then support for number of cpus > 32 (as it is today).

Right now, cpumask_t is an int, 32 bits on all our supported architecture.
cpumask_t on the other side is implemented as an array of longs, and
easilly extendible by definition.

The architectures touched by this commit are the following:
- amd64
- i386
- pc98
- arm
- ia64
- XEN

while the others are still missing.
Userland is believed to be fully converted with the changes contained
here.

Some technical notes:
- This commit may be considered an ABI nop for all the architectures
  different from amd64 and ia64 (and sparc64 in the future)
- per-cpu members, which are now converted to cpuset_t, needs to be
  accessed avoiding migration, because the size of cpuset_t should be
  considered unknown
- size of cpuset_t objects is different from kernel and userland (this is
  primirally done in order to leave some more space in userland to cope
  with KBI extensions). If you need to access kernel cpuset_t from the
  userland please refer to example in this patch on how to do that
  correctly (kgdb may be a good source, for example).
- Support for other architectures is going to be added soon
- Only MAXCPU for amd64 is bumped now

The patch has been tested by sbruno and Nicholas Esborn on opteron
4 x 12 pack CPUs. More testing on big SMP is expected to came soon.
pluknet tested the patch with his 8-ways on both amd64 and i386.

Tested by:	pluknet, sbruno, gianni, Nicholas Esborn
Reviewed by:	jeff, jhb, sbruno
2011-05-05 14:39:14 +00:00
attilio
f756d5bed6 Revert md_assert_preempt() introduction.
Discussed with:	jeff, jhb
2011-05-04 20:29:40 +00:00
attilio
b55fd3d196 Remove unnused typedef. 2011-05-01 00:08:13 +00:00
attilio
1ce93775ec Add the function md_assert_nopreempt(), which is a very consistent
function on the possibility of a thread to not preempt.

As this function is very tied to x86 (interrupts disabled checkings)
it is not intended to be used in MI code.
2011-04-30 23:12:37 +00:00
attilio
05a159a130 Remove the support for lazy cr3 switching from i386.
amd64 has already this micro-optimization removed.

Submitted by:	kib
2011-04-30 23:02:17 +00:00
jkim
369bfa0af2 Define "Hypervisor Present" bit. This bit is used by several hypervisors to
identify CPUs running under emulation.  Currently QEMU-KVM, Xen-HVM, VMware,
and MS Hyper-V are known to set this bit.

MFC after:	3 days
2011-04-28 22:23:39 +00:00
kib
01863c3790 Make pmap_invalidate_cache_range() available for consumption on amd64.
Add pmap_invalidate_cache_pages() method on x86. It flushes the CPU
cache for the set of pages, which are not neccessary mapped. Since its
supposed use is to prepare the move of the pages ownership to a device
that does not snoop all CPU accesses to the main memory (read GPU in
GMCH), do not rely on CPU self-snoop feature.

amd64 implementation takes advantage of the direct map. On i386,
extract the helper pmap_flush_page() from pmap_page_set_memattr(), and
use it to make a temporary mapping of the flushed page.

Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
2011-04-18 21:24:42 +00:00
jkim
7d94642dc2 Add a function rdtsc32() to read lower 32 bits from TSC and discard upper
32 bits.  Some times compiler inserts unnecessary instructions to preserve
unused upper 32 bits even when it is casted to a 32-bit value.  It reduces
such compiler mistakes where every cycle counts.
2011-04-14 16:53:32 +00:00
jkim
8ada5a0bae Consistently use __volatile as the rest of this file. 2011-04-14 16:19:41 +00:00
jkim
9b08b2f085 Consistently use C99 standard integers as the rest of this file. 2011-04-14 16:02:52 +00:00
jkim
69382ad692 Add forgotten declarations for tsc_perf_stat from the previous commit. 2011-04-12 22:22:01 +00:00
jkim
df8e7b4e4c Add definitions for CPUID instruction 6, ECX information. 2011-04-12 22:12:23 +00:00
jkim
0c7a0c810c Implement atomic_load_acq_64(9) and atomic_store_rel_64(9) for i386. These
functions are implemented with CMPXCHG8B instruction where it is available,
i. e., all Pentium-class and later processors.  Note this instruction is
also used for atomic_store_rel_64() because a simple XCHG-like instruction
for 64-bit memory access does not exist, unfortunately.  If the processor
lacks the instruction, i. e., 80486-class CPUs, two 32-bit load/store are
performed with interrupt temporarily disabled, assuming it does not support
SMP.  Although this assumption may be little naive, it is true in reality.
This implementation is inspired by Linux.
2011-04-06 23:59:59 +00:00
jkim
9ce8e5e965 Use cpu_ticks() for get_cyclecount(9) rather than checking existence of TSC
at run-time on i386.  cpu_ticks() is set to use RDTSC early enough on i386
where it is available.  Otherwise, cpu_ticks() is driven by the current
timecounter hardware as binuptime(9) does.  This also avoids unnecessary
namespace pollution from <machine/cputypes.h>.
2011-04-04 22:56:33 +00:00
alc
c84b8f6e0c Modestly increase the maximum allowed size of the kmem map on i386.
Also, express this new maximum as a fraction of the kernel's address
space size rather than a constant so that increasing KVA_PAGES will
automatically increase this maximum.  As a side-effect of this change,
kern.maxvnodes will automatically increase by a proportional amount.

While I'm here ensure that this change doesn't result in an unintended
increase in maxpipekva on i386.  Calculate maxpipekva based upon the
size of the kernel address space and the amount of physical memory
instead of the size of the kmem map.  The memory backing pipes is not
allocated from the kmem map.  It is allocated from its own submap of
the kernel map.  In short, it has no real connection to the kmem map.
(In fact, the commit messages for the maxpipekva auto-sizing talk
about using the kernel map size, cf. r117325 and r117391, even though
the implementation actually used the kmem map size.)  Although the
calculation is now done differently, the resulting value for
maxpipekva should remain almost the same on i386.  However, on amd64,
the value will be reduced by 2/3.  This is intentional.  The recent
change to VM_KMEM_SIZE_SCALE on amd64 for the benefit of ZFS also had
the unnecessary side-effect of increasing maxpipekva.  This change is
effectively restoring maxpipekva on amd64 to its prior value.

Eliminate init_param3() since it is no longer used.
2011-03-23 16:38:29 +00:00
jeff
2d7d8c05e7 - Merge changes to the base system to support OFED. These include
a wider arg2 for sysctl, updates to vlan code, IFT_INFINIBAND,
   and other miscellaneous small features.
2011-03-21 09:40:01 +00:00
jkim
881681406b Rework r219679. Always check CPU class at run-time to make it predictable.
Unfortunately, it pulls in <machine/cputypes.h> but it is small enough and
namespace pollution is minimal, I hope.

Pointed out by:	bde
Pointy hat:	jkim
2011-03-16 16:09:08 +00:00
jkim
8060d27e7b Partially revert r219672. After r198295, kernel need to seed randomness as
soon as possible for stack protector.  However, dummy timecounter does not
have enough entropy and we don't need to sacrifice Pentium class and later.

Pointed out by:	Maxim Dounin (mdounin at mdounin dot ru)
2011-03-15 21:45:10 +00:00
jkim
2108e6a856 Remove tsc_present from this file, really. 2011-03-15 18:09:29 +00:00
jkim
d3440080b0 Unconditionally use binuptime(9) for get_cyclecount(9) on i386. Since this
function is almost exclusively used for random harvesting, there is no need
for micro-optimization.  Adjust the manual page accordingly.
2011-03-15 17:14:26 +00:00
jkim
193712e7cf Make get_cyclecount(9) little bit more useful where binuptime(9) is used. 2011-03-14 23:30:14 +00:00
jkim
98d68ca741 Deprecate rarely used tsc_is_broken. Instead, we zero out tsc_freq because
it is almost always used with tsc_freq any way.
2011-03-10 20:02:58 +00:00
jhb
e9ec5c3def Fix whitespace nit. 2011-02-22 14:58:14 +00:00
alc
2f4da8e71e Remove pmap fields that are either unused or not fully implemented.
Discussed with:	kib
2011-02-17 15:36:29 +00:00