right places, and so it's sorted consistently with how all the other N-hundreds
of files ding this do it.
Submitted by: Hiten Pandya <hiten@uk.FreeBSD.org>
Don't expect all RIDs to be PCI rids. The previous code made at
least 1 mistake, even for PCI.
Give the card definitions a chance to specify a init function.
Use this instead of the gross superio hack.
Move the win877 init function to puc_pci.c where it belongs.
RIDs can actually be zero, don't set badmuxed if so.
Set a less incorrect end for the construct SYS_RES_IOPORT entries,
I guess both sio and lpt happen to use 8 IO ports, but that shouldn't
really be hardcoded this way.
Fixup puc_pccard.c to match.
We're getting closer.
Don't set the CCR_OPTION register when registering/deregistering
interrupts unless the card is a MFC card. This makes a lot of cards
work that didn't work before. These bits are only defined for MFC
cards.
Remove COOKIE_FOR_WARNER kludges that phk introduced.
Add more debug info.
Annoy the purists by committing two minor style nits at the same time.
Many thanks to phk. He tracked this problem down to what was screwing
things up, so fixing it became trivially easy once the problem was
understood.
which fails the make tests (doesn't understand ${notdef:U}) and therefore
fails on __FBSDID in usr.bin/make/*. -DBOOTSTRAPPING is no help here since
this is before we are using the new share/mk/* files, and it would conflict
with the builtin -DBOOTSTRAPPING support later.. so use a different flag.
This feature can be disabled via the AHD/AHC_REG_PRETTY_PRINT kernel
option.
The ahc driver now uses the same debug options mechanism as ahd:
AHC_DEBUG - Compile in debugging code
AHC_DEBUG_OPTS - String of debug options as listed in aic7xxx.h
This ensures that we don't enter our interrupt handler until
all OSM components it might reference have been fully initialized
during attach.
Remove vestiges of untagged queue handling.
Add hints to ahd_get_scb() so it knows what type of SCB collision
management to perform for each new transaction.
Properly disable/enable IU_REQ with changes in tagged queuing and
disconnection settings passed in by CAM.
Uninline some routines that are just too big to be inlined.
Add some helper macros for SCB ID collision management.
Use a hardware SCB rather than a full SCB for the "next
SCB to queue" sentinal.
Update for new "high SCBID bit" qoutfifo delivery scheme.
If interrupts are disabled on the card, don't bother running
our interrupt handler. Our handler was called due to a shared
interrupt, and the card's interrupts are explicitly disabled
to prevent entry into our interrupt handler.
functions for register pretty-printing.
Implement "top bit of SCBID is valid bit" qoutfifo delivery scheme.
"the the" -> "the".
Remove old and never used tag collision chain handling in the
sequencer. Tag collisions are never allowed to get as far as
on the controller.
Simplify busy target table handling routines.
Update comments to reflect reality.
Add support for catching more protocol violations.
Correct a bug in data fifo handling in mixed packetized and
non-packetized environments. SG_STATE must be cleared even
if an SG fetch is not in progress at the time of FIFO shutdown
or we may confuse the non-packetized transaction idle-loop.
busy target table addressing changes, our qoufifo scheme,
and long lun support.
Drop bus reset hold delay to 25us.
Remove chip workarounds for revisions that never went to
production.
Add aic7901A identification information.
Remove untagged queue logic.
Push protocol violation handler to its own routine. We now
properly detect and recovery from the following target induced
protocol violations:
o Unexpected or invalid non-packetized Relesection
o Command complete with no status message
o Good Status after incomplete cdb transfer
Add an SCB collision avoidance algorithm that allows us to
use all 512 SCBs for non-packetized operations. There is
still the possibility of running out of SCBs with non-colliding
tag identifiers, but the algorithm ensures that the stall will
be rare and short lived.
Convert to a read-only algorithm for validing entries in the
qoufifo. The sequencer now toggles the high bit of the SCB
identifier on each wrap around of the qinfifo. If the high
bit doesn't match the expected value for this pass of the
qoufifo, the entry is not valid. This has the benefit of
working on machines that have large granularity cache write
back semantics without requiring any additional memory.
Remove lots of code related to untagged SCB queues. Since
these controllers can keep a fully busy target table, we
will never have untagged SCB queues.
Lots of improvements to diagnostic logging.
Clarify some comments.
Don't clear BUSFREE interrupt enable in SIMODE1 in the SELTO
handler. Just clearing the interrupt status is sufficient and
this avoids the chance of disabling busfree detection in connection
that occurs while we are handling the busfree interrupt.
Clear all possible interrupt sources when handling a busfree
interrupt. The hardware clears some but not all of them.
Don't panic if we get into the default SCSIINT handler.
Dump the card state and clear all interrupt sources in the
hope that we can continue.
LASTPHASE != PREVPHASE. Use the correct PREVPHASE for testing
against values in the PERRDIAG register.
According to SPI4, the bus free that is required after certain
PPR negotiations will only occur at the end of all message phases.
Handle the bus free if it occurs after a transaction in either
the message-in or message-out phases. The busfree can also occur
if the status of IU_REQ changes due to a WDTR or SDTR message.
We now set the expect busfree flag in ahd_set_syncrate so that
it works regardless of message type.
Correct a problem with missing certain busfree events. The
chip supports single-stepping even if a SCSIINT is pending.
This obviates the need to clear all of the SCSI interrupt enables
prior to single stepping. Since ENBUSFREE can only be disabled
manually and not re-enabled, avoiding touching this bit in the
single-step case yields reliable bus free detection.
Enhance ahd_clear_intstat to clear all SCSIINT sources.
Only use ahd_update_pending_scbs() if we are active on the
bus. We cannot modify the "MK_MESSAGE" bits on SCBs in the
execution queue if a selection might be in process since
the sequencer uses this bit to detect PPR negotiation to
a target with an outstanding IU_REQ agreement.
Allocate the SCB delivery mechansim's sentinal SCB specially
so we don't waste a valid SCB for this task.
Move tranceive state settle logic to ahd_chip_init() since
this needs to occur after every chip reset, not just the
chip reset that happens during primary driver initialization.
Correct a bug with transmitting lun information in packetized
connections.
Restrict busy target table operations to the range of luns
that can be used for non-packetized connections. Larger luns
can only be accessed in packetized mode.
Correct a busy target table addressing bug.
Be more careful about how we shutdown the DMA engines during
bus reset events.
Only freeze the SIMQ once regardless of the number of bus
reset events that occur while we are polling for the resets
to stop.
Don't rely on the sequencer remaining paused() during our
reset poll. It is safe for the sequencer to run during this
time, and many callers to the bus reset code would need to
be modified to make this assumption universally true.
Even if we are not going to clobber SCB state when an auto-request
sense SCB has a check condition, we must still unfreeze the queue.
Re-arrange the BAD STATUS handler to handle this case appropriately.
Modify the SCB download size depending on whether long luns are
being stored in the SCB.
Add ahd_print_register() for pretty printing register diagnostics.
Don't trust that the flexport logic to detect the presence of
a seeprom is available. It may not be on some motherboard
implementations.
"the the" -> "the"
our interrupt handler. Our handler was called due to a shared
interrupt, and the card's interrupts are explicitly disabled
to prevent entry into our interrupt handler.
Set the AHC_LSCBS_ENABLED softc flag appropriately.
Convert to using softc storage for our seeprom data.
Break seeprom parsing out into a separate routine.
Change our policy in regards to AHC_SPIOCAP so that we
will allow auto-termination to take place on some aic7855
based cards.
Remove initialized but never really used variables.
Use "offset == 0" not "period == 0" to denote async trasnfers.
Implement TARG_IMMEDIATE_SCB non-disconnected target mode
SCB delivery scheme.
In our timeout handler, don't rely on the phase already being
set to denote an active connection. IDENTIFY_SEEN is more
than sufficient.
Verify that the softc passed in ahc_detach is still known
to the driver before blindly using it.
functions for register pretty-printing.
Only clear SELDO once we've recorded enough information for
the host to understand that the connection is valid. The
host uses the SELDO status as a handshake to close this
race window.
Correct a bug in target mode handling of non-disconnected
transactions. The host would indicate the correct SCB to
DMA by setting the SCB id in the currently selected hardware
SCB. Unfortunately, we would then immediated allocate a
hardware SCB which, depending on the access patern might not
be the same hardware SCB that the host setup for us. Avoid
this by having the host put the SCBID into scratch ram.
