17046 Commits

Author SHA1 Message Date
Kip Macy
cf7a8ff3b7 remove unneccessary tcbinfo lock acquisitions - set tp to null affter calling enter_timewait as we no longer own the inpcb 2008-03-24 05:21:10 +00:00
Kip Macy
3d5853271e Insulate inpcb consumers outside the stack from the lock type and offset within the pcb by adding accessor functions.
Reviewed by: rwatson
MFC after: 3 weeks
2008-03-23 22:34:16 +00:00
Pyun YongHyeon
2000cf6c0b MSI handling on some RealTek chips are broken so disable it by
default.

Reported by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
Tested by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
2008-03-23 05:35:18 +00:00
Pyun YongHyeon
03ca7ae8a9 For MSI capable hardwares, enable MSI enable bit in RL_CFG2
register.  If MSI was disabled by hw.re.msi_disable tunable
expliclty clear the MSI enable bit.
2008-03-23 05:31:35 +00:00
Pyun YongHyeon
ce6283934e Some RealTek chips are known to be buggy on DAC handling, so
disable DAC by default.
2008-03-23 05:13:45 +00:00
Pyun YongHyeon
ccf34c81f8 VLAN hardware tag information should be set for all desciptors of a
multi-descriptor transmission attempt. Datasheet said nothing about
this requirements. This should fix a long-standing VLAN hardware
tagging issues with re(4).

Reported by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
Tested by:	Giulio Ferro ( auryn AT zirakzigil DOT org )
2008-03-23 05:06:16 +00:00
Pyun YongHyeon
70acaecfd0 Always honor configured VLAN/checksum offload capabilities.
Previously re(4) used to blindly enable VLAN hardware tag stripping
and Rx checksum offload regardless of enabled optional features of
interface.
2008-03-23 04:59:13 +00:00
Qing Li
c7a0fc800c Reuse the mbuf that was just retrieved from the receive ring if mbuf
exhaustion is encountered. There was a fix made previously for this
problem but the solution (breaking out of the receive loop) does not
seem to work. mbuf reuse strategy is already adopted by other drivers
such as if_bge.  The problem was recreated and the patch is also
verified in the same test environment.
2008-03-22 18:13:39 +00:00
Sam Leffler
c28953b424 (finally) add the hal status to the diagnostic generated after
a failed ath_hal_reset call

MFC after:	3 days
2008-03-22 16:27:47 +00:00
Doug Ambrisko
a355f43ed2 Add in a compat. mode so you can either open the card's device
node or directly open mfi0 and specify the card you want to talk to
in the ioctl.
2008-03-22 02:57:49 +00:00
Remko Lodder
5f185dbd84 Add the i915 GME device to DRM.
PR:		kern/121808
Submitted by:	Volker Werth <volker at vwsoft dot com>
Approved by:	imp (mentor, implicit for trivial changes)
MFC after:	3 days
2008-03-21 16:38:42 +00:00
Søren Schmidt
471798c310 Unbreak the last commit.
Changes from the PM WIP sneaked in and caused compile errors.
2008-03-20 21:21:31 +00:00
Kip Macy
f705d735fb pay attention to default cluster limits when sizing receive queues 2008-03-20 20:52:37 +00:00
Ed Maste
42ef13a247 Restore creation of passthrough devices with newer controller firmware by
putting the correct size in the fib header.  Presumably the older firmware
silently ignored a bad size field.

(This change tested with a 3805 controller.  Passthrough devices were
created when running firmware build 12814, but not 15323 or later.  With
this change they're created for both old and new firmware versions.)

Submitted by:	Adaptec
2008-03-20 20:33:48 +00:00
Ed Maste
f355c0e081 Add ioctls FSACTL_SEND_LARGE_FIB, FSACTL_SEND_RAW_SRB,
FSACTL_LNX_SEND_LARGE_FIB, and FSACTL_LNX_SEND_RAW_SRB, and correct size
checks on FIBs passed in from userspace.  Both changes were obtained from
Adaptec's driver build 15317.  Adaptec's commandline RAID tool arcconf uses
these ioctls when creating a RAID-10 array (and probably other operations
too).
2008-03-20 17:59:19 +00:00
Sam Leffler
43b1161d4d Workaround design botch in usb: blindly mixing bus_dma with PIO does not
work on architectures with a write-back cache as the PIO writes end up
in the cache which the sync(BUS_DMASYNC_POSTREAD) in usb_transfer_complete
then discards; compensate in the xfer methods that do PIO by pushing the
writes out of the cache before usb_transfer_complete is called.

This fixes USB on xscale and likely other places.

Sponsored by:	hobnob
Reviewed by:	cognet, imp
MFC after:	1 month
2008-03-20 16:19:25 +00:00
Sam Leffler
4b539f02f5 Correct cache handling for xfer requests marked URQ_REQUEST: many (if not
all uses) involve a read but usbd_start_transfer only does a PREWRITE; change
this to BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE as I'm not sure if any
users do write+read.

Reviewed by:	cognet, imp
MFC after:	1 month
2008-03-20 16:04:13 +00:00
Søren Schmidt
8ab1ead1c0 Fix Problem with Intel Matrix RAID.
Fix from PR/121899.
2008-03-20 11:54:26 +00:00
Kevin Lo
77ac9b1757 - Add the Corega CG-WLUSB2GL from NetBSD
- Add the Corega CG-WLUSB2GPX
2008-03-20 05:05:37 +00:00
Alexander Nedotsukov
debf713e45 Improve VT_WAITACTIVE semantics.
- Wait for requested vty activation regardless its open state.
- Remove redundant console cleanup.

Approved by:	kib
MFC after:	1 week
2008-03-20 04:10:52 +00:00
Sam Leffler
ca4a3a4088 add some debug msgs for tracking xfers 2008-03-20 03:11:07 +00:00
Sam Leffler
9f55d2bb94 add support for %b printing of request + xfer flags 2008-03-20 03:09:59 +00:00
Kip Macy
ef027c528c fix link management bug and conditionally allow the PHY to be kept on at all times for allowing non-conformant link state checks 2008-03-19 20:56:51 +00:00
Adrian Chadd
05e486c71e Sign-extend the 48-bit AMD PMC counter before treating it to a 64-bit
2's compliment.

The 2's compliment transform is done so a "count down" sampling interval
can be converted into a "count up" PMC value. a 2's complimented 'count down'
value is written to the PMC counter; then the read-back counter is reverted
via another 2's compliment.

PR: kern/121660
Reviewed by: jkoshy
Approved by: jkoshy
MFC after: 1 week
2008-03-18 08:39:11 +00:00
Adrian Chadd
4dd3c84f5f Fix the debugging output - the '0x' was duplicated from the %p option. 2008-03-18 08:36:19 +00:00
Kip Macy
19905d6dbd - Integrate 1.133 vendor driver changes
- update some copyrights
- add improved support for delayed ack
- fix issue with fec
2008-03-18 03:55:12 +00:00
Poul-Henning Kamp
72d945abcc Add a "spindown" facility to ata-disks: If no requests have been received
for a configurable number of seconds, spin the disk down.  Spin it back
up on the next request.

Notice that the timeout is only armed by a request, so to spin down a
disk you may have to do:

	atacontrol spindown ad10 5
	dd if=/dev/ad10 of=/dev/null count=1

To disable spindown, set timeout to zero:

	atacontrol spindown ad10 0

In order to debug any trouble caused, this code is somewhat noisy on the
console.

Enabling spindown on a disk containing / or /var/log/messages is not
going to do anything sensible.

Spinning a disk up and down all the time will wear it out, use sensibly.

Approved by:	sos
2008-03-17 10:33:23 +00:00
Weongyo Jeong
9744c849bf don't set sniffer mode to ON when the driver is running with the
monitor mode.  This solves a problem that sometimes mangled frames
are passed.

Submitted by:	Werner Backes <werner_at_bit-1.de>
Tested by:	Werner Backes <werner_at_bit-1.de>
PR:		kern/121608
Approved by:	thompsa (mentor)
2008-03-17 02:30:13 +00:00
Robert Watson
237fdd787b In keeping with style(9)'s recommendations on macros, use a ';'
after each SYSINIT() macro invocation.  This makes a number of
lightweight C parsers much happier with the FreeBSD kernel
source, including cflow's prcc and lxr.

MFC after:	1 month
Discussed with:	imp, rink
2008-03-16 10:58:09 +00:00
Ed Maste
4109ba516e Change spelling and eliminate a typo in comments to reduce diffs with
Adaptec's vendor driver.  I have some fixes to bring in and this makes
ongoing review of the FreeBSD-Adaptec driver diffs easier.
2008-03-14 21:59:11 +00:00
Jung-uk Kim
0a84733d04 Add a quirk to ignore ASUS LCM display found on some ASUS laptops. 2008-03-14 15:59:30 +00:00
Joseph Koshy
a3d7db55cc Correct a typo. 2008-03-14 06:16:18 +00:00
John Baldwin
5217af301c Rework how the nexus(4) device works on x86 to better handle the idea of
different "platforms" on x86 machines.  The existing code already handles
having two platforms: ACPI and legacy.  However, the existing approach was
rather hardcoded and difficult to extend.  These changes take the approach
that each x86 hardware platform should provide its own nexus(4) driver (it
can inherit most of its behavior from the default legacy nexus(4) driver)
which is responsible for probing for the platform and performing
appropriate platform-specific setup during attach (such as adding a
platform-specific bus device).  This does mean changing the x86 platform
busses to no longer use an identify routine for probing, but to move that
logic into their matching nexus(4) driver instead.
- Make the default nexus(4) driver in nexus.c on i386 and amd64 handle the
  legacy platform.  It's probe routine now returns BUS_PROBE_GENERIC so it
  can be overriden.
- Expose a nexus_init_resources() routine which initializes the various
  resource managers so that subclassed nexus(4) drivers can invoke it from
  their attach routine.
- The legacy nexus(4) driver explicitly adds a legacy0 device in its
  attach routine.
- The ACPI driver no longer contains an new-bus identify method.  Instead
  it exposes a public function (acpi_identify()) which is a probe routine
  that the MD nexus(4) drivers can use to probe for ACPI.  All of the
  probe logic in acpi_probe() is now moved into acpi_identify() and
  acpi_probe() is just a stub.
- On i386 and amd64, an ACPI-specific nexus(4) driver checks for ACPI via
  acpi_identify() and claims the nexus0 device if the probe succeeds.  It
  then explicitly adds an acpi0 device in its attach routine.
- The legacy(4) driver no longer knows anything about the acpi0 device.
- On ia64 if acpi_identify() fails you basically end up with no devices.
  This matches the previous behavior where the old acpi_identify() would
  fail to add an acpi0 device again leaving you with no devices.

Discussed with:	imp
Silence on:	arch@
2008-03-13 20:39:04 +00:00
Coleman Kane
e42e0b8669 Add the module dependency on the mem(4) module. This will fix the module
failing to load on a kernel that has "nodevice mem" in the config. It will
now properly bring in the mem(4) module.

Submitted by:	antoine
Reviewed by:	imp
MFC after:	1 week
2008-03-13 14:08:41 +00:00
John Baldwin
e249f70262 Relax the BIOS/OS sempahore handoff code to workaround different hard
hangs (one at boot, one at shutdown) in recent machines.  First, only try
to take ownership of the EHCI controller if the BIOS currently owns the
controller.  On a HP DL160 G5, the machine hangs when we try to take
ownership.  Second, don't bother trying to give up ownership of the
controller during shutdown.  It's not strictly required and a Dell DCS S29
hangs on shutdown after the config write.

Both of these changes match the behavior of the Linux EHCI driver.  I also
think both of these hangs are caused by bugs in the BIOS' SMM handler
causing it to get stuck in an infinite loop in SMM.

MFC after:	1 week
2008-03-12 20:57:17 +00:00
John Baldwin
4c134f3e80 Partially revert 1.95. It changed the probe for a mouse device to only
accept a mouse using the boot subclass.  Instead, restore the original
hid_is_collection() test and fallback to testing the interface class,
subclass, and protocol if that fails.

MFC after:	1 week
PR:		usb/118670
2008-03-12 20:20:36 +00:00
Sam Leffler
810df80181 fix inverted test that disabled ACK's on xmit 2008-03-12 20:03:31 +00:00
Sam Leffler
823c77d78b add device hints to control the rx FIFO interrupt level on 16550A parts
PR:		kern/121421
Submitted by:	UEMURA Tetsuya
Reviewed by:	marcel
MFC after:	2 weeks
2008-03-12 19:09:20 +00:00
Remko Lodder
4ee0aeea8a Add resume support to the agp_i810 family.
Submitted by:	"Robert Noland" <rnoland at 2hip dot net>
Reviewed by:	anholt
Approved by:	anholt, imp (mentor)
MFC after:	1 week
2008-03-12 18:23:39 +00:00
Rafal Jaworowski
772619e186 Convert TSEC watchdog to the new scheme.
Reviewed by:	imp, marcel
Approved by:	cognet (mentor)
2008-03-12 16:35:25 +00:00
Rafal Jaworowski
ecb1ab1761 Obtain TSEC h/w address from the parent bus (OCP) and not rely blindly on what
might be currently programmed into the registers.

Underlying firmware (U-Boot) would typically program MAC address into the
first unit only, and others are left uninitialized. It is now possible to
retrieve and program MAC address for all units properly, provided they were
passed on in the bootinfo metadata.

Reviewed by:	imp, marcel
Approved by:	cognet (mentor)
2008-03-12 16:32:08 +00:00
Andrew Gallatin
47c2e9879b Remove dead code which makes a call to mem_range_attr_set().
This fixes a bug where mxge did not declare a dependancy on
mem(4), and failed to load with options nomem.

Pointed out by: antoine
2008-03-12 15:36:00 +00:00
John Baldwin
4fcf220b00 Don't enable the workaround for the jitter bug on the 5722.
Obtained from:	Linux tg3 driver
2008-03-11 15:05:54 +00:00
Pyun YongHyeon
de126af331 Teach vr(4) to use bus_dma(9) and major overhauling to handle link
state change and reliable error recovery.
 o Moved vr_softc structure and relevant macros to header file.
 o Use PCIR_BAR macro to get BARs.
 o Implemented suspend/resume methods.
 o Implemented automatic Tx threshold configuration which will be
   activated when it suffers from Tx underrun. Also Tx underrun
   will try to restart only Tx path and resort to previous
   full-reset(both Rx/Tx) operation if restarting Tx path have failed.
 o Removed old bit-banging MII interface. Rhine provides simple and
   efficient MII interface. While I'm here show PHY address and PHY
   register number when its read/write operation was failed.
 o Define VR_MII_TIMEOUT constant and use it in MII access routines.
 o Always honor link up/down state reported by mii layers. The link
   state information is used in vr_start() to determine whether we
   got a valid link.
 o Removed vr_setcfg() which is now handled in vr_link_task(), link
   state taskqueue handler. When mii layer reports link state changes
   the taskqueue handler reprograms MAC to reflect negotiated duplex
   settings. Flow-control changes are not handled yet and it should
   be revisited when mii layer knows the notion of flow-control.
 o Added a new sysctl interface to get statistics of an instance of
   the driver.(sysctl dev.vr.0.stats=1)
 o Chip name was renamed to reflect the official name of the chips
   described in VIA Rhine I/II/III datasheet.
	REV_ID_3065_A -> REV_ID_VT6102_A
	REV_ID_3065_B -> REV_ID_VT6102_B
	REV_ID_3065_C -> REV_ID_VT6102_C
	REV_ID_3106_J -> REV_ID_VT6105_A0
	REV_ID_3106_S -> REV_ID_VT6105M_A0
   The following chip revisions were added.
	#define REV_ID_VT6105_B0	0x83
	#define REV_ID_VT6105_LOM	0x8A
	#define REV_ID_VT6107_A0	0x8C
	#define REV_ID_VT6107_A1	0x8D
	#define REV_ID_VT6105M_B1	0x94
 o Always show chip revision number in device attach. This shall help
   identifying revision specific issues.
 o Check whether EEPROM reloading is complete by inspecting the state
   of VR_EECSR_LOAD bit. This bit is self-cleared after the EEPROM
   reloading. Previously vr(4) blindly spins for 200us which may/may
   not enough to complete the EEPROM reload.
 o Removed if_mtu setup. It's done in ether_ifattach().
 o Use our own callout to drive watchdog timer.
 o In vr_attach disable further interrupts after reset. For VT6102 or
   newer hardwares, diable MII state change interrupt as well because
   mii state handling is done by mii layer.
 o Add more sane register initialization for VT6102 or newer chips.
    - Have NIC report error instead of retrying forever.
    - Let hardware detect MII coding error.
    - Enable MODE10T mode.
    - Enable memory-read-multiple for VT6107.
 o PHY address for VT6105 or newer chips is located at fixed address 1.
   For older chips the PHY address is stored in VR_PHYADDR register.
   Armed with these information, there is no need to re-read
   VR_PHYADDR register in miibus handler to get PHY address. This
   saves one register access cycle for each MII access.
 o Don't reprogram VR_PHYADDR register whenever access to a register
   located at a PHY address is made. Rhine fmaily allows reprogramming
   PHY address location via VR_PHYADDR register depending on
   VR_MIISTAT_PHYOPT bit of VR_MIISTAT register. This used to lead
   numerous phantom PHYs attached to miibus during phy probe phase and
   driver used to limit allowable PHY address in mii register accessors
   for certain chip revisions. This removes one more register access
   cycle for each MII access.
 o Correctly set VLAN header length.
 o bus_dma(9) conversion.
    - Limit DMA access to be in range of 32bit address space. Hardware
      doesn't support DAC.
    - Apply descriptor ring alignment requirements(16 bytes alignment)
    - Apply Rx buffer address alignment requirements(4 bytes alignment)
    - Apply Tx buffer address alignment requirements(4 bytes alignment)
      for Rhine I chip. Rhine II or III has no Tx buffer address
      alignment restrictions, though.
    - Reduce number of allowable number of DMA segments to 8.
    - Removed the atomic(9) used in descriptor ownership managements
      as it's job of bus_dmamap_sync(9).
    With these change vr(4) should work on all platforms.
 o Rhine uses two separated 8bits command registers to control Tx/Rx
   MAC. So don't access it as a single 16bit register.
 o For non-strict alignment architectures vr(4) no longer require
   time-consuming copy operation for received frames to align IP
   header. This greatly improves Rx performance on i386/amd64
   platforms. However the alignment is still necessary for
   strict-alignment platforms(e.g. sparc64). The alignment is handled
   in new fuction vr_fixup_rx().
 o vr_rxeof() now rejects multiple-segmented(fragmented) frames as
   vr(4) is not ready to handle this situation. Datasheet said nothing
   about the reason when/why it happens.
 o In vr_newbuf() don't set VR_RXSTAT_FIRSTFRAG/VR_RXSTAT_LASTFRAG
   bits as it's set by hardware.
 o Don't pass checksum offload information to upper layer for
   fragmented frames. The hardware assisted checksum is valid only
   when the frame is non-fragmented IP frames. Also mark the checksum
   is valid for corrupted frames such that upper layers doesn't need
   to recompute the checksum with software routine.
 o Removed vr_rxeoc(). RxDMA doesn't seem to need to be idle before
   sending VR_CMD_RX_GO command. Previously it used to stop RxDMA
   first which in turn resulted in long delays in Rx error recovery.
 o Rewrote Tx completion handler.
    - Always check VR_TXSTAT_OWN bit in status word prior to
      inspecting other status bits in the status word.
    - Collision counter updates were corrected as VT3071 or newer
      ones use different bits to notify collisions.
    - Unlike other chip revisions, VT86C100A uses different bit to
      indicate Tx underrun. For VT3071 or newer ones, check both
      VR_TXSTAT_TBUFF and VR_TXSTAT_UDF bits to see whether Tx
      underrun was happend. In case of Tx underrun requeue the failed
      frame and restart stalled Tx SM. Also double Tx DMA threshold
      size on each failure to mitigate future Tx underruns.
    - Disarm watchdog timer only if we have no queued packets,
      otherwise don't touch watchdog timer.
 o Rewrote interrupt handler.
    - status word in Tx/Rx descriptors indicates more detailed error
      state required to recover from the specific error. There is no
      need to rely on interrupt status word to recover from Tx/Rx
      error except PCI bus error. Other event notifications like
      statistics counter overflows or link state events will be
      handled in main interrupt handler.
    - Don't touch VR_IMR register if we are in suspend mode. Touching
      the register may hang the hardware if we are in suspended state.
      Previously it seems that touching VR_IMR register in interrupt
      handler was to work-around panic occurred in system shutdown
      stage on SMP systems. I think that work-around would hide
      root-cause of the panic and I couldn't reproduce the panic
      with multiple attempts on my box.
 o While padding space to meet minimum frame size, zero the pad data
   in order to avoid possibly leaking sensitive data.
 o Rewrote vr_start_locked().
    - Don't try to queue packets if number of available Tx descriptors
      are short than that of required one.
 o Don't reinitialize hardware whenever media configuration is
   changed. Media/link state changes are reported from mii layer if
   this happens and vr_link_task() will perform necessary changes.
 o Don't reinitialize hardware if only PROMISC bit was changed. Just
   toggle the PROMISC bit in hardware is sufficient to reflect the
   request.
 o Rearrganed the IFCAP_POLLING/IFCAP_HWCSUM handling in vr_ioctl().
 o Generate Tx completion interrupts for every VR_TX_INTR_THRESH-th
   frames. This reduces Tx completion interrupts under heavy network
   loads.
 o Since vr(4) doesn't request Tx interrupts for every queued frames,
   reclaim any pending descriptors not handled in Tx completion
   handler before actually firing up watchdog timeouts.
 o Added vr_tx_stop()/vr_rx_stop() to wait for the end of active
   TxDMA/RxDMA cycles(draining). These routines are used in vr_stop()
   to ensure sane state of MAC before releasing allocated Tx/Rx
   buffers. vr_link_task() also takes advantage of these functions to
   get to idle state prior to restarting Tx/Rx.
 o Added vr_tx_start()/vr_rx_start() to restart Rx/Tx. By separating
   Rx operation from Tx operation vr(4) no longer need to full-reset
   the hardware in case of Tx/Rx error recovery.
 o Implemented WOL.
 o Added VT6105M specific register definitions. VT6105M has the
   following hardware capabilities.
    - Tx/Rx IP/TCP/UDP checksum offload.
    - VLAN hardware tag insertion/extraction. Due to lack of information
       for getting extracted VLAN tag in Rx path, VLAN hardware support
       was not implemented yet.
    - CAM(Content Addressable Memory) based 32 entry perfect multicast/
      VLAN filtering.
    - 8 priority queues.
 o Implemented CAM based 32 entry perfect multicast filtering for
   VT6105M. If number of multicast entry is greater than 32, vr(4)
   uses traditional hash based filtering.
 o Reflect real Tx/Rx descriptor structure. Previously vr(4) used to
   embed other driver (private) data into these structure. This type
   of embedding make it hard to work on LP64 systems.
 o Removed unused vr_mii_frame structure and MII bit-baning
   definitions.
 o Added new PCI configuration registers that controls mii operation
   and mode selection.
 o Reduced number of Tx/Rx descriptors to 128 from 256. From my
   testing, increasing number of descriptors above than 64 didn't help
   increasing performance at all. Experimentations show 128 Rx
   descriptors seems to help a lot reducing Rx FIFO overruns under
   high system loads. It seems the poor Tx performance of Rhine
   hardwares comes from the limitation of hardware. You wouldn't
   satuarte the link with vr(4) no matter how fast CPU/large number of
   descriptors are used.
 o Added vr_statistics structure to hold various counter values.

No regression was reported but one variant of Rhine III(VT6105M)
found on RouterBOARD 44 does not work yet(Reported by Milan Obuch).
I hope this would be resolved in near future.

I'd like to say big thanks to Mike Tancsa who kindly donated a Rhine
hardware to me. Without his enthusiastic testing and feedbacks
overhauling vr(4) never have been possible. Also thanks to Masayuki
Murayama who provided some good comments on the hardware's internals.
This driver is result of combined effort of many users who provided
many feedbacks so I'd like to say special thanks to them.

Hardware donated by:	Mike Tancsa (mike AT sentex dot net)
Reviewed by:		remko (initial version)
Tested by:		Mike Tancsa(x86), JoaoBR ( joao AT matik DOT com DOT br )
			Marcin Wisnicki ( mwisnicki+freebsd AT gmail DOT com )
			Stefan Ehmann ( shoesoft AT gmx DOT net )
			Florian Smeets ( flo AT kasimir DOT com )
			Phil Oleson ( oz AT nixil DOT net )
			Larry Baird ( lab AT gta DOT com )
			Milan Obuch ( freebsd-current AT dino DOT sk )
			remko (initial version)
2008-03-11 04:51:22 +00:00
Pyun YongHyeon
ea7d6fcdcd Forced commit to note that vr(4) was repocopied from sys/pci
and modified for its new location.
2008-03-11 03:44:46 +00:00
Pyun YongHyeon
2b71cf8696 Move comments block 1 line up to remark on the setting
if_capabilities. This would make comments clear.

Suggested by:	yar
2008-03-11 02:39:52 +00:00
Andrew Thompson
82f1b132a4 Update wpi(4) with stability fixes
- remove second taskqueue
 - busdma 16k alignment workaround
 - use busdma instead of external mbuf storage on Rx
 - locking fixes
 - net80211 state change fixes
 - improve scanning reliability
 - improve radio hw switch interaction
 - consolidate callouts

Parts obtained from:	benjsc, sam
Tested by:		many
2008-03-10 23:16:48 +00:00
John Baldwin
463e0f91cb Probe CPUs after the PCI hierarchy on i386, amd64, and ia64. This allows
the cpufreq drivers to reliably use properties of PCI devices for quirks,
etc.
- For the legacy drivers, add CPU devices via an identify routine in the
  CPU driver itself rather than in the legacy driver's attach routine.
- Add CPU devices after Host-PCI bridges in the acpi bus driver.
- Change the ichss(4) driver to use pci_find_bsf() to locate the ICH and
  check its device ID rather than having a bogus PCI attachment that only
  checked for the ID in probe and always failed.  As a side effect, you
  can now kldload ichss after boot.
- Fix the ichss(4) driver to use the correct device_t for the ICH (and not
  for ichss0) when doing PCI config space operations to enable SpeedStep.

MFC after:	2 weeks
Reviewed by:	njl, Andriy Gapon  avg of icyb.net.ua
2008-03-10 22:18:07 +00:00
Marius Strobl
801772ec32 - Fix some style bugs and remove another banal comment missed in
rev. 1.46.
- Move the KASSERT on gem_add_rxbuf() to the right spot and add an
  equivalent one to gem_disable_tx().
2008-03-09 17:55:19 +00:00
Rui Paulo
8a000acaa9 Some PIIX4 chipsets need to be told to generate Stop Breaks by setting
the appropriate bit in the DEVACTB register.
This change allows the C2 state on those systems to work as expected.

Reviewed by:	njl
Submitted by:	Andriy Gapon <avg at icyb.net.ua>
MFC after:	1 week
2008-03-09 11:19:03 +00:00