Commit Graph

576 Commits

Author SHA1 Message Date
jake
c82e5b1791 Forgot to commit this.
Spotted by:	scottl
2002-08-01 21:39:54 +00:00
blackend
9c8ad2f838 Fix the link to the Handbook 2002-08-01 17:21:18 +00:00
jake
4f9b822dcc Modify the cache handling code to assume 2 virtual colours, which is much
simpler and easier to get right.  Add comments.  Add more statistic
gathering on cacheable and uncacheable mappings.
2002-08-01 00:16:22 +00:00
jake
8e116e9548 Add some statistic gathering for cache flushes. 2002-07-31 23:39:50 +00:00
jake
14cd8a4891 These file are no longer used (moved to userland and/or merged into
pmap.c).
2002-07-31 16:23:27 +00:00
jake
9ee8091c36 These were repo-copied to have a .S extension. 2002-07-31 15:56:15 +00:00
jake
eb814d118c Add definitions for statistical and high-resolution profiling. The calling
conventions for _mcount and __cyg_profile_func_enter are different, so
statistical profiling kernels build and link but don't actually work.
IWBNI one could tell gcc to only generate calls to the former.

Define uintfptr_t properly for userland, but not for the kernel (I hope).
2002-07-30 06:14:34 +00:00
jake
5b1899e180 The data cache on UltraSPARC III is not directly mapped, so don't assert
that.  This breaks assumptions made by some of the cache flushing code,
but UltraSPARC III has different methods for invalidating cache lines
anyway.
2002-07-30 05:48:33 +00:00
jake
d8a2beb660 Panic if the data cache has too many virtual colors (more than 2). 2002-07-30 04:19:07 +00:00
jake
27afff05e2 Use _ALIGN_DATA and _ALIGN_TEXT. 2002-07-30 02:27:24 +00:00
mike
9f0ddc464e Create a new header <machine/_stdint.h> for storing MD parts of
<stdint.h>.  Previously, parts were defined in <machine/ansi.h> and
<machine/limits.h>.  This resulted in two problems:
  (1) Defining macros in <machine/ansi.h> gets in the way of that
      header only defining types.
  (2) Defining C99 limits in <machine/limits.h> adds pollution to
      <limits.h>.
2002-07-29 17:41:23 +00:00
jake
082a6afc1c Add routines needed for high resolution profiling. 2002-07-29 00:45:13 +00:00
jake
9511cbbc05 Add a symbol for btext. 2002-07-29 00:42:00 +00:00
jake
4461489ac6 Remove a stale comment. 2002-07-29 00:40:48 +00:00
jake
3ae3385f62 Use _ALIGN_TEXT. Implement __cyg_profile_func_enter and
__cyg_profile_func_exit for GUPROF.
2002-07-29 00:39:46 +00:00
jake
16fa260a5e Add _ALIGN_DATA and _ALIGN_TEXT macros. 2002-07-29 00:38:07 +00:00
jake
fea62cdb6b Remove some stuff that snuck in last commit. 2002-07-29 00:37:05 +00:00
jake
5bd1876975 Fix a bug introduced in previous commit. Due to the interaction of the
direct physical mappings with virtual page colour, we need to flush the
data cache when a page changes colour.  I missed one case which broke
pipes.
2002-07-28 19:15:34 +00:00
mike
99cfb0b9e9 Revert the previous delta; uintfptr_t needs to be available to
userland for libc/gmon to compile, so the typedef in <machine/types.h>
isn't good enough.  This is really ugly since we end up with the
actual value which uintfptr_t is typedef'd from, in multiple places.
This is bug for bug compatible with the other FreeBSD architectures.

Noticed by:	sparc64 tinderbox
2002-07-28 15:59:51 +00:00
jake
d468b2beab Add declarations for btext and etext. 2002-07-28 01:01:14 +00:00
jake
f1f241d7d0 uintfptr_t has moved to machine/types.h. 2002-07-27 23:36:51 +00:00
jake
d1139f54e7 Implement a direct mapped address region, like alpha and ia64. This
basically maps all of physical memory 1:1 to a range of virtual addresses
outside of normal kva.  The advantage of doing this instead of accessing
phsyical addresses directly is that memory accesses will go through the
data cache, and will participate in the normal cache coherency algorithm
for invalidating lines in our own and in other cpus' data caches.  So
we don't have to flush the cache manually or send IPIs to do so on other
cpus.  Also, since the mappings never change, we don't have to flush them
from the tlb manually.
This makes pmap_copy_page and pmap_zero_page MP safe, allowing the idle
zero proc to run outside of giant.

Inspired by:	ia64
2002-07-27 21:57:38 +00:00
mike
1dd324f9f2 Catch up to rev 1.339 of src/sys/conf/options (PCI_ENABLE_IO_MODES is
now a sysctl and is enabled by default).
2002-07-27 15:28:35 +00:00
jake
dc1ed5c34f Remove the tlb argument to tlb_page_demap (itlb or dtlb), in order to better
match the pmap_invalidate api.
2002-07-26 15:54:04 +00:00
mjacob
4553d5e202 Set interrupt clear pointer for SBus slots to point to correct spot. 2002-07-25 20:14:59 +00:00
peter
0d8fe1f3c6 de-count pci 2002-07-23 06:38:47 +00:00
peter
0e1289a90e Add explicit unit count on 'device pci' for ahc/ahd 2002-07-21 23:07:31 +00:00
peter
cc7b2e4248 Infrastructure tweaks to allow having both an Elf32 and an Elf64 executable
handler in the kernel at the same time.  Also, allow for the
exec_new_vmspace() code to build a different sized vmspace depending on
the executable environment.  This is a big help for execing i386 binaries
on ia64.   The ELF exec code grows the ability to map partial pages when
there is a page size difference, eg: emulating 4K pages on 8K or 16K
hardware pages.

Flesh out the i386 emulation support for ia64.  At this point, the only
binary that I know of that fails is cvsup, because the cvsup runtime
tries to execute code in pages not marked executable.

Obtained from:  dfr (mostly, many tweaks from me).
2002-07-20 02:56:12 +00:00
jhb
0dbee33a27 Various comment and minor style fixes. No actual content changes.
Inspired by:	bde
2002-07-16 18:20:17 +00:00
tmm
339b19ff87 When multiple IOMMUs are present in a system, use a single TSB for all
of them, and couple them by always performing all operations on all
present IOMMUs. This is required because with the current API there
is no way to determine on which bus a busdma operation is performed.

While being there, clean up the iommu code a bit.

This should be a step in the direction of allow some of larger machines
to work; tests have shown that there still seem to be problems left.
2002-07-16 18:17:03 +00:00
tmm
bda13f0cba Add new UltraSPARC-III VIS II instructions. 2002-07-16 17:44:01 +00:00
tmm
1fb9947f02 Add new LSU bits for UltraSPARC-III. 2002-07-16 16:24:03 +00:00
tmm
0d2b3aeaaa Add ASI definitions of UltraSPARC-III (Cu) processors, and add some
previously missing US-I and II ones.
2002-07-16 16:22:25 +00:00
alc
52c89de021 o Lock page queue accesses by vm_page_wire(). 2002-07-14 23:23:47 +00:00
jake
fd7d3c2e28 Try both upa-portid and portid properties when finding the module id of a
secondary cpu.  Its called portid on UltraSPARCIII machines.
2002-07-14 00:08:58 +00:00
jake
04b64987c3 Remove debug code. 2002-07-14 00:01:16 +00:00
alc
828e129a10 o Complete the locking of page queue accesses by vm_page_unwire().
o Assert that the page queues lock is held in vm_page_unwire().
 o Make vm_page_lock_queues() and vm_page_unlock_queues() visible
   to kernel loadable modules.
2002-07-13 20:55:21 +00:00
mini
a02f691cf3 Add additional cred_free_thread() calls that I had missed the first time.
Pointed out by:	jhb
2002-07-13 04:36:50 +00:00
jake
eefbe93dbb Use a fixed address for KERNBASE, so it doesn't change if the size of KVA
is increased.  Its confusing for all the kernel addresses to change, and
doesn't serve much purpose as far as conserving address space.
2002-07-13 03:29:10 +00:00
jake
5d43846206 Identify UltraSPARC-III and UltraSPARC-III+ cpus. 2002-07-13 03:23:29 +00:00
jhb
91bb8201ee Set the thread state of the newly chosen to run thread to TDS_RUNNING in
choosethread() in MI C code instead of doing it in in assembly in all the
various cpu_switch() functions.  This fixes problems on ia64 and sparc64.

Reviewed by:	julian, peter, benno
Tested on:	i386, alpha, sparc64
2002-07-12 18:34:22 +00:00
tmm
b08811be07 When sending cache flushing IPIs, don't try to IPI the triggering CPU
itself; this causes undefined behaviour on UltraSPARCs. In particular,
the interrupt packet data words will not necessarily be delivered
correctly, which would result in a crash.
This bug also caused the cache-flushing work to be done twice on the
triggering CPU (when it did not cause crashes).

Reviewed by:	jake
2002-07-12 16:26:49 +00:00
jhb
30b152864c thread_exit() requires PROC_LOCK to be held, so lock it. 2002-07-11 22:13:33 +00:00
mike
7ffb7525e5 Remove label_t and physadr, which seem to have never been used in
FreeBSD.

Submitted by:	bde
2002-07-10 15:47:59 +00:00
mike
ebfda4c0dd Move __offsetof() macro from <machine/ansi.h> to <sys/cdefs.h>. It's
hardly MD, since all our platforms share the same macro.  It's not
really compiler dependent either, but this helps in reducing
<machine/ansi.h> to only type definitions.
2002-07-08 16:43:35 +00:00
peter
62e40d1277 Add a special page zero entry point intended to be called via the single
threaded VM pagezero kthread outside of Giant.  For some platforms, this
is really easy since it can just use the direct mapped region.  For others,
IPI sending is involved or there are other issues, so grab Giant when
needed.

We still have preemption issues to deal with, but Alan Cox has an
interesting suggestion on how to minimize the problem on x86.

Use Luigi's hack for preserving the (lack of) priority.

Turn the idle zeroing back on since it can now actually do something useful
outside of Giant in many cases.
2002-07-08 04:24:26 +00:00
peter
b73c441dad Collect all the (now equivalent) pmap_new_proc/pmap_dispose_proc/
pmap_swapin_proc/pmap_swapout_proc functions from the MD pmap code
and use a single equivalent MI version.  There are other cleanups
needed still.

While here, use the UMA zone hooks to keep a cache of preinitialized
proc structures handy, just like the thread system does.  This eliminates
one dependency on 'struct proc' being persistent even after being freed.
There are some comments about things that can be factored out into
ctor/dtor functions if it is worth it.  For now they are mostly just
doing statistics to get a feel of how it is working.
2002-07-07 23:05:27 +00:00
peter
2727877234 Fix (s/proc/thread/) some typos in two panic messages. 2002-07-07 22:50:41 +00:00
peter
48d11f9343 Back out proc part of last commit. UMA manages the thread cache only, and
we just have to deal with the kstack when told to.  We do not have a
UMA-managed cache for the proc struct and its associated upage yet.  So,
go back to the old lazy mechanism.  Note that if UMA destroys pages that
used to contain proc structures, we'll lose the corresponding upage
forever.  (zones never did this - once a page was allocated, it stayed
attached to the proc zone forever)
2002-07-05 01:27:35 +00:00
peter
5d120cf80b Take a shot at implementing changes from i386/pmap.c rev 1.328-1.331. 2002-07-05 00:38:43 +00:00