Commit Graph

333 Commits

Author SHA1 Message Date
tijl
606babe108 Rename __wchar_t so it no longer conflicts with __wchar_t from clang 3.4
-fms-extensions.

MFC after:	2 weeks
2014-04-01 14:46:11 +00:00
emaste
dfd2dcdc01 Update NetBSD Foundation copyrights to 2-clause BSD
The NetBSD Foundation states "Third parties are encouraged to change the
license on any files which have a 4-clause license contributed to the
NetBSD Foundation to a 2-clause license."

This change removes clauses 3 and 4 from copyright / license blocks that
list The NetBSD Foundation as the only copyright holder.

Sponsored by:	The FreeBSD Foundation
2014-03-18 01:40:25 +00:00
rwatson
177e7097b2 Update MIPS bootinfo.h to reflect the actual MIPS boot2/loader boot-time
interface.

MFC after:	3 weeks
Sponsored by:	DARPA, AFRL
2014-02-19 09:19:09 +00:00
nwhitehorn
f06ffda243 Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
  (aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
  non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
  requests to its parent (nexus). This allows x86 FDT devices to allocate
  both memory and IO requests and removes the last notionally MI use of
  fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
  FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
2014-01-05 18:46:58 +00:00
alc
6c60c88452 As of r257209, all architectures have defined VM_KMEM_SIZE_SCALE. In other
words, every architecture is now auto-sizing the kmem arena.  This revision
changes kmeminit() so that the definition of VM_KMEM_SIZE_SCALE becomes
mandatory and the definition of VM_KMEM_SIZE becomes optional.

Replace or eliminate all existing definitions of VM_KMEM_SIZE.  With
auto-sizing enabled, VM_KMEM_SIZE effectively became an alternate spelling
for VM_KMEM_SIZE_MIN on most architectures.  Use VM_KMEM_SIZE_MIN for
clarity.

Change kmeminit() so that the effect of defining VM_KMEM_SIZE is similar to
that of setting the tunable vm.kmem_size.  Whereas the macros
VM_KMEM_SIZE_{MAX,MIN,SCALE} have had the same effect as the tunables
vm.kmem_size_{max,min,scale}, the effects of VM_KMEM_SIZE and vm.kmem_size
have been distinct.  In particular, whereas VM_KMEM_SIZE was overridden by
VM_KMEM_SIZE_{MAX,MIN,SCALE} and vm.kmem_size_{max,min,scale}, vm.kmem_size
was not.  Remedy this inconsistency.  Now, VM_KMEM_SIZE can be used to set
the size of the kmem arena at compile-time without that value being
overridden by auto-sizing.

Update the nearby comments to reflect the kmem submap being replaced by the
kmem arena.  Stop duplicating the auto-sizing formula in every machine-
dependent vmparam.h and place it in kmeminit() where auto-sizing takes
place.

Reviewed by:	kib (an earlier version)
Sponsored by:	EMC / Isilon Storage Division
2013-11-08 16:25:00 +00:00
brooks
18b853b71e MFP4:
Change 221534 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/01/27 16:05:30

        FreeBSD/mips stores page-table entries in a near-identical format
        to MIPS TLB entries -- only it overrides certain "reserved" bits
        in the MIPS-defined EntryLo register to hold software-defined bits
        (swbits) to avoid significantly increasing the page table memory
        footprint.  On n32 and n64, these bits were (a) colliding with
        MIPS64r2 physical memory extensions and (b) being improperly
        cleared.

        Attempt to fix both of these problems by pushing swbits further
        along 64-bit EntryLo registers into the reserved space, and
        improving consistency between C-based and assembly-based clearing
        of swbits -- in particular, to use the same definition.  This
        should stop swbits from leaking into TLB entries -- while ignored
        by most current MIPS hardware, this would cause a problem with
        (much) larger physical memory sizes, and also leads to confusing
        hardware-level tracing as physical addresses contain unexpected
        (and inconsistent) higher bits.

        Discussed with: imp, jmallett

Change 1187301 by brooks@brooks_zenith on 2013/10/23 14:40:10
        Loop back the initial commit of 221534 to HEAD.  Correct its
        implementation for mips32.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-23 21:35:39 +00:00
brooks
51470cc33f Revert r256934, it needs work to build on mips32. 2013-10-23 13:32:52 +00:00
brooks
995d9bb7fe MFP4:
Change 228019 by bz@bz_zenith on 2013/04/23 13:55:30

	Add kernel side support for large TLB on BERI/CHERI.
	Modelled similar to NLM

MFC after:	3 days
Sponsored by:	DAPRA/AFRL
2013-10-22 21:08:25 +00:00
brooks
b3379a2c0b MFP4:
Change 221534 by rwatson@rwatson_zenith_cl_cam_ac_uk on 2013/01/27 16:05:30

        FreeBSD/mips stores page-table entries in a near-identical format
        to MIPS TLB entries -- only it overrides certain "reserved" bits
        in the MIPS-defined EntryLo register to hold software-defined bits
        (swbits) to avoid significantly increasing the page table memory
        footprint.  On n32 and n64, these bits were (a) colliding with
        MIPS64r2 physical memory extensions and (b) being improperly
        cleared.

        Attempt to fix both of these problems by pushing swbits further
        along 64-bit EntryLo registers into the reserved space, and
        improving consistency between C-based and assembly-based clearing
        of swbits -- in particular, to use the same definition.  This
        should stop swbits from leaking into TLB entries -- while ignored
        by most current MIPS hardware, this would cause a problem with
        (much) larger physical memory sizes, and also leads to confusing
        hardware-level tracing as physical addresses contain unexpected
        (and inconsistent) higher bits.

        Discussed with: imp, jmallett

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-22 21:06:27 +00:00
imp
296c494bdc Elminate NON_LEAF and use NESTED instead to unify our assembler
conventions.

Reviewed by:	jmallet@
2013-10-15 04:45:09 +00:00
imp
87b5f4698d Replace NLEAF with LEAF_NOPROFILE to unify the conventions we use in
our assembler files.

Reviewed by:	jmallet@
2013-10-15 04:44:21 +00:00
imp
0dd44faac7 Replace uses of the ALEAF macro with XLEAF and remove ALEAF macro to
try to unify the conventions used in our assembler.

Reviewed by:	jmallet@
2013-10-15 04:43:31 +00:00
imp
9a9fbbc1d0 Move DO_AST into pcb.h where it should have been all along. Move some
common macros for saving/restoring registers into pcb.h as well.
2013-10-15 04:36:34 +00:00
adrian
2d83a106ef Add "better" MIPS24k and MIPS74k barriers.
* the mips74k cores only need EHB (which is 'sll $0, $0, 3')
  here; NOPs don't actually work.

* add EHB as the last NOP for the default barriers/hazards;
  that is "better" behaviour and should work on a wider
  variety of processors.

This allows the existing (icky) TLB code to work, allowing
the AR9344 SoC (mips74k) to actually get through kernel startup.

Tested:

* AR9344 SoC - (mips74k)
* AR9331 SoC - (mips24k)

TODO:

* test on mips4k CPUs, just to be sure.

* document that sll $0, $0, 3 is actually "EHB" and that it
  falls back to being a NOP for pre-mips32r1.

* mips24k has an errata that we currently don't correctly explicitly
  state - ie, that after DERET/ERET, the only valid instruction is
  a NOP.

Reviewed by:	imp@
Approved by:	re@ (gjb)
2013-10-09 00:27:12 +00:00
glebius
cf37135185 Fix build with gcc. Move sf_buf_alloc()/sf_buf_free() declarations
to MD headers.
2013-09-06 17:44:13 +00:00
glebius
358d3d145a On those machines, where sf_bufs do not represent any real object, make
sf_buf_alloc()/sf_buf_free() inlines, to save two calls to an absolutely
empty functions.

Reviewed by:	alc, kib, scottl
Sponsored by:	Nginx, Inc.
Sponsored by:	Netflix
2013-09-06 05:37:49 +00:00
imp
09ea56b1ca Newer versions of gcc define __INT64_C and __UINT64_C, so avoid
redefining them if gcc provides them.
2013-09-03 22:04:55 +00:00
avg
4e6c4b2a36 Revert r253748,253749
This WIP should not have been committed yet.

Pointyhat to:	avg
2013-07-28 18:44:17 +00:00
avg
ea04b46439 put contents of cpu.h under _KERNEL
no userland-serviceable parts inside

MFC after:	20 days
2013-07-28 18:32:27 +00:00
imp
12ff612352 Nearly a complete rewrite of elf.h.
Start with NetBSD's sys/arch/mips/include/elf_machdep.h 1.18. Remove the NetBSD
specific glue pieces (leaving mostly just relocation types).

Add in FreeBSD specific glue pieces from older versions of this file, and
move to the top of the file:
r237430 | kib | 2012-06-22 00:38:31 -0600 (Fri, 22 Jun 2012) | 5 lines
r232449 | jmallett | 2012-03-03 01:19:18 -0700 (Sat, 03 Mar 2012) | 18 lines
r217097 | kib | 2011-01-07 07:22:34 -0700 (Fri, 07 Jan 2011) | 3 lines
r211412 | kib | 2010-08-17 02:55:45 -0600 (Tue, 17 Aug 2010) | 7 lines
r202908 | gonzo | 2010-01-23 19:59:22 -0700 (Sat, 23 Jan 2010) | 4 lines
r195356 | imp | 2009-07-05 01:00:51 -0600 (Sun, 05 Jul 2009) | 6 lines
r195128 | gonzo | 2009-06-27 17:27:41 -0600 (Sat, 27 Jun 2009) | 4 lines
r197933 | kib | 2009-10-10 09:31:24 -0600 (Sat, 10 Oct 2009) | 9 lines
r189926 | kib | 2009-03-17 06:50:16 -0600 (Tue, 17 Mar 2009) | 9 lines
r186191 | imp | 2008-12-16 13:07:47 -0700 (Tue, 16 Dec 2008) | 7 lines
as closely as I can tell, the projects/mips branch merge was disruptive
to good history.

This should make merges easier in the future from NetBSD and vice versa.
2013-07-09 19:01:38 +00:00
imp
07b5dea6f5 Remove all the NOPs after SYNC. They aren't needed.
They originated in the original Octeon port. They weren't present, as
far as I can tell, on the projects/mips branch until after this
point. They were in the original Octeon port in code picked up from
the vendor, who I've been able to find out trolling old email put them
there to get around an SMP problem that most likely was fixed in other
ways.

NetBSD and Linux don't have these, except for some specific uses of
SYNC on the alchemy parts (which we don't support, but even if we did
it is only a specific case and would be specifically coded
anyway). This is true of the current Linux code, as well as one old
version I polled.

I looked back at the old R12000, R8000, R6000, R4000, R4400 errata
that I have, and could find no mention of SYNC needing NOPs for
silicon bugs (although plenty of other cases where NOPs and other
contortions were needed).

An Google search turned up no old mailing list discussions on this on
Linux, NetBSD or FreeBSD (except the disussion that kicked off these
studies).

I've test booted this on my Octeon Plus eval board and survived a
buildworld. Adrian Chadd reports that this patch has no ill effects on
the Ahteros platforms he tested it on.

I conclude it is safe to just remove the NOPs. But added
__MIPS_PLATFORM_SYNC_NOPS as a failsafe in case we find some platform
where these are, in fact, required.

Reviewed by:	adrian@
2013-07-07 16:12:22 +00:00
kib
8a0279994d Fix issues with zeroing and fetching the counters, on x86 and ppc64.
Issues were noted by Bruce Evans and are present on all architectures.

On i386, a counter fetch should use atomic read of 64bit value,
otherwise carry from the increment on other CPU could be lost for the
given fetch, making error of 2^32.  If 64bit read (cmpxchg8b) is not
available on the machine, it cannot be SMP and it is enough to disable
preemption around read to avoid the split read.

On x86 the counter increment is not atomic on purpose, which makes it
possible for the store of the incremented result to override just
zeroed per-cpu slot.  The effect would be a counter going off by
arbitrary value after zeroing.  Perform the counter zeroing on the
same processor which does the increments, making the operations
mutually exclusive.  On i386, same as for the fetching, if the
cmpxchg8b is not available, machine is not SMP and we disable
preemption for zeroing.

PowerPC64 is treated the same as amd64.

For other architectures, the changes made to allow the compilation to
succeed, without fixing the issues with zeroing or fetching.  It
should be possible to handle them by using the 64bit loads and stores
atomic WRT preemption (assuming the architectures also converted from
using critical sections to proper asm).  If architecture does not
provide the facility, using global (spin) mutex would be non-optimal
but working solution.

Noted by:  bde
Sponsored by:	The FreeBSD Foundation
2013-07-01 02:48:27 +00:00
attilio
b24a52ec9e Rename VM_NDOMAIN into MAXMEMDOM and move it into machine/param.h in
order to match the MAXCPU concept.  The change should also be useful
for consolidation and consistency.

Sponsored by:	EMC / Isilon storage division
Obtained from:	jeff
Reviewed by:	alc
2013-05-07 22:46:24 +00:00
imp
9003746e9a Don't include asm.h in non-asm files.
Remove #define to get kludges that asm.h used to define
Move clever macros to access assembler instructions to trap.c
Remove __ASSEMBLER__ ifdefs in regdef.h: they aren't needed anymore.
2013-05-01 06:57:46 +00:00
imp
8648dd7eea Import NetBSD's version, which is perfectly fine.
Submitted by:	jmallet@
2013-05-01 06:22:50 +00:00
imp
e614c62520 Add the standard #ifdef header protection. 2013-05-01 05:48:32 +00:00
imp
209bc458d4 Import virgin regdef.h from 4.4 Lite 2's sys/pmax/include/regdef.h,
expand the %sccs.include.redist.c% directive with the standard
3-clause license, and add $FreeBSD$ to keep the commit script happy.

# This may break some mips stuff, which will be fixed in the next commit.
2013-05-01 05:46:54 +00:00
imp
a3c707ad59 Use the offsets from pcb.h rather than regnum.h to store the registers
in the pcb. setjmp/longjmp in the kernel also used these values, so
continue to use them although their use isn't technically the pcb
register array (matching is all that's important for setjmp/longjmp in
the kernel). Finally, eliminate the old register names from regnum.h.

This is a lexical change only. The non-debug .o files have the same md5.
2013-04-25 17:23:54 +00:00
imp
26718d463f Make it possible to include this file in assembler .S sources. 2013-04-25 06:29:23 +00:00
imp
b6d3001ad9 Update trapframe to be consistent with the changes made to regnum.h. This
should fix the booting problems people have been seeing.
2013-04-23 09:38:18 +00:00
brooks
9ffb368a3b MFP4 223084, 227821:
Partially implement generic_bs_*_8() for MIPS platforms.

This is known to work with TARGET_ARCH=mips64 with FreeBSD/BERI.
Assuming that other definitions in cpufunc.h are correct it will
work on non-o64 ABI systems except sibyte. On sibyte and o32 systems
generic_bs_*_8() will remain panic() implementations.

Sponsored by:	DARPA, AFRL
Reviewed by:	imp, jmallett (older versions)
2013-04-22 19:02:37 +00:00
imp
59249e7e5b Point to regdef.h. May need to dig up references to the N32 standard
that support this usage (which may be a bit rough, since different
parts of the standard say mutually contradictory things).
2013-04-16 16:54:37 +00:00
imp
927d79346e Fix N32/N64 register saving by ensuring that all registers resolve
to unique values.

There's some confusion about what the n32 assembler API really is
(since on page 9 of the spec they say that t0-t3 don't exist, then
turn around on page 22 and say that t4-t7 don't exist), and this
doesn't touch that.

NetBSD's version of this file follows the convention I used here, and
is likely to be correct.

This should fix gdb/ptrace.
2013-04-15 19:32:14 +00:00
jchandra
ad2a2fb3b7 Move MIPS_MAX_TLB_ENTRIES definition from cpuregs.h to tlb.c
Having MIPS_MAX_TLB_ENTRIES defined to 128 is misleading, since it used
to be 64 in older releases of MIPS architecture (where it could be read
from Config1) and can be much more than 128 for the newer processors.

For now, move the definition to the only file using it (mips/mips/tlb.c)
and define MIPS_MAX_TLB_ENTRIES depending on the MIPS cpu defined. Also
add few checks so that we do not write beyond the end of the tlb_state
array.

This fixes a kernel data corruption seen in Netlogic XLP, which was casued
by tlb_save() writing beyond the end of tlb_state array when breaking into
debugger.
2013-04-12 17:22:12 +00:00
glebius
9cf64d6c35 Merge from projects/counters: counter(9).
Introduce counter(9) API, that implements fast and raceless counters,
provided (but not limited to) for gathering of statistical data.

See http://lists.freebsd.org/pipermail/freebsd-arch/2013-April/014204.html
for more details.

In collaboration with:	kib
Reviewed by:		luigi
Tested by:		ae, ray
Sponsored by:		Nginx, Inc.
2013-04-08 19:40:53 +00:00
glebius
8c6eba117e Merge from projects/counters:
Pad struct pcpu so that its size is denominator of PAGE_SIZE. This
is done to reduce memory waste in UMA_PCPU_ZONE zones.

Sponsored by:	Nginx, Inc.
2013-04-08 19:19:10 +00:00
alc
1628a85079 Define VM_KMEM_SIZE_MAX as a fraction of the kernel address space size
rather than a constant so that VM_KMEM_SIZE_MAX will scale automatically
with the kernel address space size.  This is particularly important for
MIPS because the same definition is used by both 32- and 64-bit kernels.

Tested by:	jchandra
2013-01-12 18:06:21 +00:00
rwatson
18c527acfc Merge Perforce changeset 219925 to head:
Provided a bus_space implementation for FDT, modelled on
  bus_space_generic, but with a local version of the map address
  routine that does a P->V translation, as is the case with NLM's
  similar routine for XLP.  It's not clear to me that this is the
  right solution -- possibly this belongs in simplebus -- however,
  it is sufficient to get the DE4 LED driver working.

Sponsored by:	DARPA, AFRL
2013-01-12 15:58:20 +00:00
rwatson
9a5b2389dd Merge Perforce change @219948 to head:
Add code so that the BERI boot process can ask the kernel linker for
  DTB blobs that may have been left for it by the boot loader, as done
  on PowerPC and ARM.  This will require both a more mature boot
  loader, and more mature boot loader argument passing mechanism,
  than currently supported on BERI.

Sponsored by:	DARPA, AFRL
2013-01-12 13:20:21 +00:00
alc
09af01583b Eliminate some definitions that haven't been used in a decade or more. 2012-12-19 05:07:27 +00:00
alc
1bce6c4064 The function pmap_alloc_direct_page() unconditionally zeroes the returned
page.  Therefore, it is really inappropriate for use by the function
uma_small_alloc().  The effect of using it was that every page was zeroed
at least once and possibly twice if M_ZERO was passed as a "wait" flag.
2012-11-14 17:33:00 +00:00
attilio
6997194551 Add an unified macro to deny ability from the compiler to reorder
instruction loads/stores at its will.
The macro __compiler_membar() is currently supported for both gcc and
clang, but kernel compilation will fail otherwise.

Reviewed by:	bde, kib
Discussed with:	dim, theraven
MFC after:	2 weeks
2012-10-09 14:32:30 +00:00
alc
8eccaae22c Introduce a new TLB invalidation function for efficiently invalidating
address ranges, and use this function in pmap_remove().

Tested by:	jchandra
2012-10-02 07:14:22 +00:00
alc
57f09aa635 Introduce a new software PTE flag that indicates whether the mapping is
for a managed page.

Tested by:	jchandra
2012-09-01 03:46:28 +00:00
rwatson
e384ca8b42 Add MD syscons header file for MIPS.
Sponsored by:	DARPA, AFRL
2012-08-25 17:57:50 +00:00
alc
802e8319f0 Retire PV_TABLE_MOD. When we destroy or write protect a dirty mapping,
we call vm_page_dirty().  Maintaining the PV_TABLE_MOD flag, in addition,
serves no useful purpose.
2012-08-25 16:55:38 +00:00
alc
5cc57da5bd Port the new PV entry allocator from amd64/i386. This allocator has two
advantages.  First, PV entries are roughly half the size.  Second, this
allocator doesn't access the paging queues, and thus it will allow for the
removal of the page queues lock from this pmap.

Fix a rather serious bug in pmap_remove_write().  After removing write
access from the specified page's first mapping, pmap_remove_write() then
used the wrong "next" pointer.  Consequently, the page's second, third,
etc. mappings were not write protected.

Tested by:	jchandra
2012-08-13 17:38:38 +00:00
alc
9b3a7015c6 Merge r132141 and r111272 from amd64/i386:
Reduce the size of a PV entry by eliminating pv_ptem.  There is no need
  to store a pointer to the page table page in the PV entry because it is
  easily computed during the walk down the page table.

  Eliminate the ptphint from the pmap.  Long, long ago, page table pages
  belonged to a vm object, and we would look up page table pages based
  upon their offset within this vm object.  In those days, this hint may
  have had tangible benefits.

Tested by:	jchandra
2012-08-09 16:38:17 +00:00
andrew
0a7002aae7 Make the wchar_t type machine dependent.
This is required for ARM EABI. Section 7.1.1 of the Procedure Call for the
ARM Architecture (AAPCS) defines wchar_t as either an unsigned int or an
unsigned short with the former preferred.

Because of this requirement we need to move the definition of __wchar_t to
a machine dependent header. It also cleans up the macros defining the limits
of wchar_t by defining __WCHAR_MIN and __WCHAR_MAX in the same machine
dependent header then using them to define WCHAR_MIN and WCHAR_MAX
respectively.

Discussed with:	bde
2012-06-24 04:15:58 +00:00
kib
7b36a08108 Implement mechanism to export some kernel timekeeping data to
usermode, using shared page.  The structures and functions have vdso
prefix, to indicate the intended location of the code in some future.

The versioned per-algorithm data is exported in the format of struct
vdso_timehands, which mostly repeats the content of in-kernel struct
timehands. Usermode reading of the structure can be lockless.
Compatibility export for 32bit processes on 64bit host is also
provided. Kernel also provides usermode with indication about
currently used timecounter, so that libc can fall back to syscall if
configured timecounter is unknown to usermode code.

The shared data updates are initiated both from the tc_windup(), where
a fast task is queued to do the update, and from sysctl handlers which
change timecounter. A manual override switch
kern.timecounter.fast_gettime allows to turn off the mechanism.

Only x86 architectures export the real algorithm data, and there, only
for tsc timecounter. HPET counters page could be exported as well, but
I prefer to not further glue the kernel and libc ABI there until
proper vdso-based solution is developed.

Minimal stubs neccessary for non-x86 architectures to still compile
are provided.

Discussed with:	bde
Reviewed by:	jhb
Tested by:	flo
MFC after:	1 month
2012-06-22 07:06:40 +00:00