Commit Graph

188 Commits

Author SHA1 Message Date
jhb
520aafe3ec Add an external mbuf buffer type that holds multiple unmapped pages.
Unmapped mbufs allow sendfile to carry multiple pages of data in a
single mbuf, without mapping those pages.  It is a requirement for
Netflix's in-kernel TLS, and provides a 5-10% CPU savings on heavy web
serving workloads when used by sendfile, due to effectively
compressing socket buffers by an order of magnitude, and hence
reducing cache misses.

For this new external mbuf buffer type (EXT_PGS), the ext_buf pointer
now points to a struct mbuf_ext_pgs structure instead of a data
buffer.  This structure contains an array of physical addresses (this
reduces cache misses compared to an earlier version that stored an
array of vm_page_t pointers).  It also stores additional fields needed
for in-kernel TLS such as the TLS header and trailer data that are
currently unused.  To more easily detect these mbufs, the M_NOMAP flag
is set in m_flags in addition to M_EXT.

Various functions like m_copydata() have been updated to safely access
packet contents (using uiomove_fromphys()), to make things like BPF
safe.

NIC drivers advertise support for unmapped mbufs on transmit via a new
IFCAP_NOMAP capability.  This capability can be toggled via the new
'nomap' and '-nomap' ifconfig(8) commands.  For NIC drivers that only
transmit packet contents via DMA and use bus_dma, adding the
capability to if_capabilities and if_capenable should be all that is
required.

If a NIC does not support unmapped mbufs, they are converted to a
chain of mapped mbufs (using sf_bufs to provide the mapping) in
ip_output or ip6_output.  If an unmapped mbuf requires software
checksums, it is also converted to a chain of mapped mbufs before
computing the checksum.

Submitted by:	gallatin (earlier version)
Reviewed by:	gallatin, hselasky, rrs
Discussed with:	ae, kp (firewalls)
Relnotes:	yes
Sponsored by:	Netflix
Differential Revision:	https://reviews.freebsd.org/D20616
2019-06-29 00:48:33 +00:00
cem
3288ae0d72 kernel build: Disable unhelpful GCC warning (tripped after r346352)
-Wformat-zero-length does not highlight any particularly wrong code and it
is especially meaningless for device_printf().  Turn it off entirely to
remove a source of false positives.

Sponsored by:	Dell EMC Isilon
2019-04-19 20:08:45 +00:00
mmacy
87196b28a0 gcov support
add gcov support and export results as files in debugfs

Reviewed by:	hps@
MFC after:	1 week
Sponsored by:	iX Systems
Differential Revision:	https://reviews.freebsd.org/D19260
2019-02-23 21:14:00 +00:00
markj
204d7bf6cd Remove a use of a negative array index from fxp(4).
This fixes a warning seen when compiling amd64 GENERIC with clang 7.
Also remove the workaround added in r337324.  clang 7 and gcc 4.2
generate the same code with or without the code change.

Reviewed by:	imp (previous version)
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D18603
2018-12-19 04:54:32 +00:00
dim
4b4bc3c457 Merge ^/head r339813 through r340125. 2018-11-04 15:49:06 +00:00
emaste
78c2ba0e74 Retire CLANG_NO_IAS34
CLANG_NO_IAS34 was introduced in r276696 to allow then-HEAD kernels to
be built with clang 3.4 in FreeBSD 10.  As FreeBSD 11 and later includes
a version of Clang with a sufficiently capable integrated assembler we
do not need the workaround any longer.

Sponsored by:	The FreeBSD Foundation
2018-11-01 23:11:47 +00:00
dim
1116024d04 Merge ^/head r338392 through r338594. 2018-09-11 18:41:00 +00:00
br
2f2449cc1c Enable 'C'-compressed ISA extension.
This was disabled recently due to lack of support in KDB disassembler
and DTrace FBT provider. Support for 'C'-extension to both of these was
added, so we can now enable 'C'-extension.

This reduces size of the kernel important for low-end embedded devices,
and saves cache footprint for high perfomance machines.

Approved by:	re (kib)
Sponsored by:	DARPA, AFRL
2018-09-03 14:43:16 +00:00
dim
8c594c4622 Put in a temporary workaround for strange array access in if_fxp.c. 2018-08-04 15:38:18 +00:00
br
a5b13c9a11 Disable 'C'-compressed ISA extension.
It works excellent, but KDB disassembler and DTrace FBT provider for
RISC-V do lack support for it. They currently handle 4-byte instructions
only, while C-compressed ISA extension introduces 2-byte instructions
freely mixing them together.

So disable it for now.

Reviewed by:	markj@
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D16436
2018-07-25 16:07:35 +00:00
imp
000ad38a32 Remove kernel support for armeb
Remove all the big-endian arm architectures (ixp425 and ixp435)
support in the kernel and associated drivers.

Differential Revision:  https://reviews.freebsd.org/D16257
2018-07-17 23:23:45 +00:00
br
578540897a Fix build: ignore a GCC 7.2.0 warning which says that third argument of
memset(3) should contain the number of elements multiplied by the element
size.

Sponsored by:	DARPA, AFRL
2018-06-04 16:20:22 +00:00
mmacy
b2201d4e88 disable set but not used on code that can't be changed 2018-05-19 04:46:34 +00:00
mmacy
d5878b87ff Silence non-actionable warnings in vendor code
We can't modify vendor code so there's no signal in warnings from it.
Similarly -Waddress-of-packed-member is not useful on networking code
as access to packed structures is fundamental to its operation.
2018-05-19 00:04:01 +00:00
mmacy
fda8de182b % WITHOUT_FORMAT_EXTENSIONS= XCC=/usr/local/bin/gcc8 make -j96 buildkernel KERNCONF=GENERIC-NODEBUG -s >& log
% grep "inlining failed" log | wc
     234    3570   36065
Consensus on those polled is that inlining failure warnings are not useful

Approved by:	sbruno
2018-05-04 19:31:28 +00:00
mmacy
a72d7d4204 fix gcc8 compile
Approved by:	sbruno
2018-05-04 18:25:07 +00:00
br
39ba61c907 Add ld emulation types for hard-float mipses.
Sponsored by:	DARPA, AFRL
2018-04-12 15:12:40 +00:00
cem
e60f2e5d99 Implement NO_WCAST_QUAL for gcc4.2 architectures 2018-03-12 05:41:27 +00:00
emaste
33289f97a0 Add kernel retpoline option for amd64
Retpoline is a compiler-based mitigation for CVE-2017-5715, also known
as Spectre V2, that protects against speculative execution branch target
injection attacks.

In this commit it is disabled by default, but will be changed in a
followup commit.

Reviewed by:	bdrewery (previous version)
MFC after:	3 days
Security:	CVE-2017-5715
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D14242
2018-02-28 14:57:45 +00:00
nwhitehorn
839dd38bd3 Automatically use the ELFv2 ABI on powerpc64 if supported by the compiler.
This has the same effects on DDB working as -mcall=aixdesc, but also is
supported by clang and marginally improves kernel performance.

MFC after:	2 weeks
2017-11-25 21:44:23 +00:00
imp
d67d8724ce Remove build system support for lint.
Differential Revision: https://reviews.freebsd.org/D13124
2017-11-17 18:16:46 +00:00
jhb
5f0eb85166 Remove CPU_HAVEFPU.
Instead, use a runtime decision to handle COP1 traps.  If floating point
support is present in the current CPU, enable saving of the floating point
state.  If support is not present, fail with SIGILL.

Reviewed by:	imp, br
Sponsored by:	DARPA / AFRL
Differential Revision:	https://reviews.freebsd.org/D12707
2017-10-18 17:23:16 +00:00
imp
c5ddd11381 Support armv7 builds for userland
Make armv7 as a new MACHINE_ARCH.

Copy all the places we do armv6 and add armv7 as basically an
alias. clang appears to generate code for armv7 by default. armv7 hard
float isn't supported by the the in-tree gcc, so it hasn't been
updated to have a new default.

Support armv7 as a new valid MACHINE_ARCH (and by extension
TARGET_ARCH).

Add armv7 to the universe build.

Differential Revision: https://reviews.freebsd.org/D12010
2017-10-05 23:01:33 +00:00
rlibby
cc7a6452e8 gcc builds: reenable -Wstrict-overflow for kern.mk
Reviewed by:	emaste
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D12284
2017-09-14 03:42:41 +00:00
br
b002bfbade Support for v1.10 (latest) of RISC-V privilege specification.
New version is not compatible on supervisor mode with v1.9.1
(previous version).

Highlights:
    o BBL (Berkeley Boot Loader) provides no initial page tables
      anymore allowing us to choose VM, to build page tables manually
      and enable MMU in S-mode.
    o SBI interface changed.
    o GENERIC kernel.
      FDT is now chosen standard for RISC-V hardware description.
      DTB is now provided by Spike (golden model simulator). This
      allows us to introduce GENERIC kernel. However, description
      for console and timer devices is not provided in DTB, so move
      these devices temporary to nexus bus.
    o Supervisor can't access userspace by default. Solution is to
      set SUM (permit Supervisor User Memory access) bit in sstatus
      register.
    o Compressed extension is now turned on by default.
    o External GCC 7.1 compiler used.
    o _gp renamed to __global_pointer$
    o Compiler -march= string is now in use allowing us to choose
      required extensions (compressed, FPU, atomic, etc).

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D11800
2017-08-10 14:18:09 +00:00
jhb
5643c29d52 Fix the linker emulation setting for riscv.
Reported by:	lwhsu
MFC after:	1 week
Sponsored by:	DARPA / AFRL
2017-04-05 18:59:58 +00:00
jhb
dddd156d67 Always pass the linker emulation via -m when linking modules and kernels.
Previously the linker emulation was only passed when building binary
objects for firmware modules.  This change always passes the desired
output format for kernel modules and kernels rather than requiring the
toolchain's default output format to match the desired output format.
This in turn permits use of external toolchains whose default output
format does not match the desired output format.

Reviewed by:	imp, emaste
Sponsored by:	DARPA / AFRL
Differential Revision:	https://reviews.freebsd.org/D10085
2017-04-05 03:05:04 +00:00
jhb
f14e427858 Use correct linker emulation name for armeb.
MFC after:	1 week
Sponsored by:	DARPA / AFRL
Differential Revision:	https://reviews.freebsd.org/D10085
2017-04-05 02:52:49 +00:00
dim
84a536d04e Merge ^/head r312968 through r313054. 2017-02-01 21:21:01 +00:00
jhibbits
254b85f1d9 Update CFLAGS for clang compatibility
* Clang/llvm does not (yet) support -m(no-)spe, so make it gcc-only
* Clang now supports -msoft-float, and does not appear to recognize
  "-disable-ppc-float-in-variadic", which appears to have been a crutch until
  soft-float was implemented.  It's now implemented for both 32- and 64-bit.
* Clang/llvm use a 'medium' code model by default for powerpc64, supporting up
  to 4GB TOC, and does not support the '-mminimal-toc' option.  Given both of
  these, make -mminimal-toc gcc-only.

MFC after:	2 weeks
2017-01-31 01:55:29 +00:00
dim
fd9531cf36 For kernel builds, make the -Waddress-of-packed-member warning non-fatal.
The warning is informative, but often there is no real alignment problem.
2017-01-08 18:14:28 +00:00
kan
682afebec1 Support mips[*]hf variants in config files
Recognize new MACHINE_ARCH names now as we have added hardfloat support.
Switch JZ4780 to mipselhf and remove all uses of TARGET_ARCH in kernel
.mk files.

Reviewed by:	adrian
Differential Revision:	https://reviews.freebsd.org/D8989
2016-12-30 00:34:52 +00:00
br
fbeb8fc5ac Add full softfloat and hardfloat support for MIPS.
This adds new target architectures for hardfloat:
mipselhf mipshf mips64elhf mips64hf.

Tested in QEMU only.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D8376
2016-10-31 15:33:58 +00:00
jhibbits
40c4c3de40 Create a new MACHINE_ARCH for Freescale PowerPC e500v2
Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor
unit, which doubles as a FPU.  The PowerPC SPE ABI is incompatible with the
stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this.
Additionaly, the SPE opcodes overlap with Altivec, so these are mutually
exclusive.  Taking advantage of this fact, a new file, powerpc/booke/spe.c, was
created with the same function set as in powerpc/powerpc/altivec.c, so it
becomes effectively a drop-in replacement.  setjmp/longjmp were modified to save
the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by
the SPE).

Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not
support double-precision floating point.

Also, without a new MACHINE_ARCH it would be impossible to provide binary
packages which utilize the SPE.

Additionally, no work has been done to support ports, work is needed for this.
This also means no newer gcc can yet be used.  However, gcc's powerpc support
has been refactored which would make adding a powerpcspe-freebsd target very
easy.

Test Plan:
This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222
(P1022-based) board, compiled against the new ABI.  Base system utilities
(/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot
multiuser.

Reviewed By:	bdrewery, imp
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D5683
2016-10-22 01:57:15 +00:00
andrew
ddc1124282 Set INLINE_LIMIT in the aarch64 case for gcc.
Submitted by:	andreast
MFC after:	1 week
2016-10-09 21:47:20 +00:00
emaste
fe86760299 Always pass -m to ld for converting binary files to kernel ELF objects
This is in preparation for linking with LLVM's lld, which does not have
a compiled-in default output emulation. lld requires that it is
specified via the -m option, or obtained from the object file(s) being
linked.

This will also allow all build targets to share a common linker binary.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D7837
2016-09-20 17:07:14 +00:00
dim
a37cccc119 For kernel builds, instead of suppressing certain clang warnings, make
them non-fatal, so there is some incentive to fix them eventually.
2016-09-04 17:55:22 +00:00
br
8d8cea7deb Normalise the CWARNFLAGS inter-word spacing: remove all leading
and trailing space, and convert multiple consecutive spaces to
single space.

This helps to keep build output looking good.
2016-07-28 17:18:02 +00:00
br
76608ba084 o Add warn flags required to build modules with GCC 6.1;
o Sort GCC 4.8 warn flags.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
2016-07-28 13:15:23 +00:00
br
899e79ab1c Fix style. 2016-07-24 18:04:12 +00:00
br
a2369fab37 Add GCC 6.1 warn flags for kernel as well.
Sponsored by:	DARPA, AFRL
2016-07-22 16:15:35 +00:00
ngie
57d7cc1e84 Revert r302403
lang/gcc{48,49,5} lacks -fformat-extensions support (causing build errors, which
is what prompted r302403 to be committed). devel/amd64-gcc on the other hand
(which is used by Jenkins), has the support.

This fixes the Jenkins failure emails due to excessive warnings being produced
with "make buildkernel".

Discussed with: lwhsu
Reported by: Jenkins (FreeBSD_HEAD_amd64_gcc job)
Sponsored by: EMC / Isilon Storage Division
2016-07-08 16:29:45 +00:00
ngie
d57552ab74 Do not use -fformat-extensions with non-base versions of gcc
Ports versions of gcc do not have -fformat-extensions support.

This unbreaks compiling the kernel/modules with non-base gcc (4.8,
5.0, etc) if MK_FORMAT_EXTENSIONS=yes (the default).

Approved by: re (gjb)
Differential Revision: https://reviews.freebsd.org/D7150
Reviewed by: bdrewery
Sponsored by: EMC / Isilon Storage Division
2016-07-07 22:44:23 +00:00
bdrewery
c53e82adb1 We only support GCC 4.8 for these flags.
- 4.7 introduced maybe-uninitialized
- 4.8 introduced aggressive-loop-optimizations

Sponsored by:	EMC / Isilon Storage Division
2016-03-13 19:17:48 +00:00
bdrewery
9dc08e6714 Remove more references to targets we've never had.
Sponsored by:	EMC / Isilon Storage Division
2016-02-26 22:13:35 +00:00
br
7b0a8f7745 Use medany (Medium/Anywhere) GCC code model for RISC-V.
This will allow us to use bigger relocations and all
the 64-bit VA space.
2016-02-18 14:38:37 +00:00
br
778a34fa2a Welcome the RISC-V 64-bit kernel.
This is the final step required allowing to compile and to run RISC-V
kernel and userland from HEAD.

RISC-V is a completely open ISA that is freely available to academia
and industry.

Thanks to all the people involved! Special thanks to Andrew Turner,
David Chisnall, Ed Maste, Konstantin Belousov, John Baldwin and
Arun Thomas for their help.
Thanks to Robert Watson for organizing this project.

This project sponsored by UK Higher Education Innovation Fund (HEIF5) and
DARPA CTSRD project at the University of Cambridge Computer Laboratory.

FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv

Reviewed by:	andrew, emaste, kib
Relnotes:	Yes
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4982
2016-01-29 15:12:31 +00:00
imp
bcce3a9a60 Revert this change. It broke the trampoline build. Until I'm sure
nothing else is broken, I'm reverting.
2015-12-21 20:36:01 +00:00
imp
69774947bf Move some MIPS specific flags to be more congruent with other
architectures.
2015-12-19 19:20:48 +00:00
kib
b2d840b61f Build changes that allow the modules on arm64.
- Move the required kernel compiler flags from Makefile.arm64 to kern.mk.
- Build arm64 modules as PIC; non-PIC relocations in .o for shared object
  output cannot be handled.
- Do not try to install aarch64 symlink.
- A hack for arm64 to avoid ld -r stage.  See the comment for the explanation.
  Some functionality is lost, like ctf handling, but hopefully will be
  restored after newer linker is available.

Reviewed by:	andrew, emaste
Tested by:	andrew (on real hardware)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D3796
2015-10-08 17:42:08 +00:00