Commit Graph

270 Commits

Author SHA1 Message Date
zbb
3086783967 Add function to dump PCIE MBUS decoding windows and bars
This commit allows to dump PCIE MBUS and bars configuration
for Marvell platforms.

Submitted by:   Michal Mazur <mkm@semihalf.com>
Obtained from:  Semihalf
Sponsored by:   Netgate
Differential revision: https://reviews.freebsd.org/D10908
2017-06-08 16:57:06 +00:00
zbb
5dfa5d72e7 Support multi-port PCIe hierarchy in Marvell boards DTS
This commit is another part of preparation for PCIe multi-port
support for Marvell SoCs. Some device trees include pcie-controller
node as a bus-parent of pcie nodes. This patch adds support for
new bus, collects and configures device informations and finally
adds PCIB devices as a childs of pcie-controller in Newbus hierarchy.

Submitted by:	Marcin Mazurek <mma@semihalf.com>
Obtained form:	Semihalf
Sponsored by:	Stormshield
Reviewed by:    https://reviews.freebsd.org/D10906
2017-06-08 16:54:02 +00:00
zbb
1326a8a13d Fix PCIe window decoding on Armada 38x
Original PCIe nodes for Marvell SoCs consists of ports' nodes
under main controller node. In order to properly parse
this kind of representation in DT a mechanism for traversing
through the tree required an update. Moreover, processing FDT
data consisting of more than 2 cells had to be fixed,
because the 'reg' property of mrvl,pcie node have additional
parameter in front of 64-bit address. It should be skipped
by default. This commit works properly with old mrvl,pcie
representation for Kirkwood and ArmadaXP SoCs.

Submitted by:	Wojciech Macek <wma@semihalf.com>
		Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield, Netgate
Differential revision: https://reviews.freebsd.org/D10905
2017-06-08 16:51:46 +00:00
zbb
553d3e55f3 Enable MBUS bridge configuration in mv_rtc driver
This patch fixes sporadic problems with updating time
with mv_rtc driver by configuring access to it via MBUS.
For this purpose already existing second set of resources
in rtc@3800 node of Armada 38x DT is used.

Submitted by: Dominik Ermel <der@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10901
2017-06-08 16:48:09 +00:00
zbb
15a9261deb Add reset capability to mv_rtc driver
This commit enables optional reset of the RTC, in case
its registers' contents did not sustain the reboot or power-off/on
sequence. Without it, further usage of RTC is impossible
(e.g. writing values to RTC_TIME register will not succeed).

The reset is performed only if Clock Correction register
does not comprise RTC_NOMINAL_TIMING, what helps to distinguish,
whether the software configured RTC before or it comprises
the default value.

Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10900
2017-06-08 16:46:38 +00:00
zbb
359ab6c10b Unmask legacy interrupts on Marvell PCIE controller
This patch fixes a bug introduced with commit:
r294510  "Remove an extra '!' found by clang 3.8."

'!' was removed without inverting the logic, which
broke PCIe legacy interrupts operation for Marvell
controllers.

Submitted by: Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Netgate
2017-05-25 14:34:21 +00:00
zbb
5fe68cd90c Add workaround for CESA MBUS windows with 4GB DRAM
Armada 38x SoC's equipped with 4GB DRAM suffer freeze
during CESA operation, if MBUS window opened at given
DRAM CS reaches end of the address space. Apply a workaround
by setting the window size to the closest possible
value, i.e. divide it by 2 (it has to be power-of-2).

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10724
2017-05-25 14:25:05 +00:00
zbb
235f0e77ca Fix PM recognition on recent Marvell boards
PM status is only supported on Kirkwood and Disvovery.
Cleanup the code to properly report its state on
other platforms.

Submitted by: Wojciech Macek <wma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10718
2017-05-25 14:23:49 +00:00
zbb
c43f8e7fa4 Introduce separate watchdog driver for Armada to fix phony DELAY
DELAY is a problematic routine called all over the kernel.
Armada38x using CA-9 CPUs are using mpcore timer to count events
and measure time but DELAY in the mpcore timer code is a weak
function reference and therefore will be replaced by the platform
implementation if the one is introduced. Since Armada38x uses
on-chip watchdog to which the driver is merged with the on-chip timer
driver there will be a platform DELAY implementation.
The latter however will not use any HW timers as it will not attempt
to configure any. Phony busy loop will be used instead.

To fix that we introduce a separate watchdog driver for Armada platforms,
(currently only A38X) and stop using Marvell timer driver. That
switches DELAY to the desired implementation.

Submitted by: Zbigniew Bodek <zbb@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10710
2017-05-25 14:22:00 +00:00
zbb
97a43b9155 Enable SCU Speculative linefills to L2 on Armada 38x
Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10709
2017-05-25 14:19:20 +00:00
zbb
2b25a3b2c3 Fix memory corruption while configuring CPU windows on Marvell SoCs
Resolving CPU windows from localbus entry caused buffer overflow
and memory corruption. Fix wrong indexing and ensure the index
does not exceed table size.

Submitted by: Wojciech Macek <wma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10720
2017-05-25 14:16:43 +00:00
wma
e77dc5266b Fix boot up on ARMADA38X uniprocessor variant
Marvell Armada 380 is a uni-processor variant of the 38x SoC
family. A function platform_mp_setmaxid() was setting a hardcoded
value, which caused boot fail on A380. Fix this by relying on
the CPU count obtained from device tree nodes.

Submitted by:  Marcin Wojtas <mw@semihalf.com
Obtained from: Semihalf
Sponsored by:  Netgate
Reviewed by:   loos
Differential revision: https://reviews.freebsd.org/D10783
2017-05-19 08:26:41 +00:00
wma
910ae5e9b5 Fix MPIC mask/unmask
Before the fix for single interrupt, both percpu and non-percpu routes
were enabled/disable at the same time.

Submitted by:  Marcin Wojtas <mw@semihalf.com
Obtained from: Semihalf
Sponsored by:  Stormshield, Netgate
Reviewed by:   loos
Differential revision: https://reviews.freebsd.org/D10716
2017-05-19 08:25:40 +00:00
wma
d2baf237b6 Enable proper configuration of CESA MBUS windows
For all Marvell devices, MBUS windows configuration is done
in a common place. Only CESA was an exception, so move its
related code from driver to mv_common.c. This way it uses
same proper DRAM information, same as  all other interfaces
instead of parsing DT /memory node directly.

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10723
2017-05-19 08:19:39 +00:00
loos
cad66fd322 Use the MACROS to access the Global mpic registers. Makes the code
consistent and easier to read.

While here, remove two unused static functions and fix a unused function
warning when building !INTRNG.

No functional changes.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2017-05-17 21:14:27 +00:00
zbb
254aea0839 Fix registration of MPIC driver
Submitted by:  Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Netgate
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10717
2017-05-17 15:57:14 +00:00
zbb
19cc118b1f Correct MPIC order of attachment
If MPIC happens to be a slave interrupt controller (as on Armada38x),
it should be attached after primary interrupt controller.
Thus BUS_PASS_ORDER_LATE was added to default BUS_PASS_INTERRUPT.

This change doesn't affect the cases when MPIC is standalone IC.

Submitted by:  Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Stormshield, Netgate
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10715
2017-05-17 15:56:09 +00:00
zbb
ba51542898 Enable proper parsing of nested simlpe-buses on Marvell platforms
OF_finddevice doesn't find the "simple-bus" node, which is problematic
for Marvell platforms, using nested buses in Device Tree, like
Armada 38x SoC.

Submitted by: Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Obtained from: Stormshield
Sponsored by: Stormshield
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10719
2017-05-17 15:54:33 +00:00
zbb
b7d47a1821 Parse EHCI windows on Marvell platforms
Add missing compatibility string to allow proper
window configuration for EHCI devices.

Submitted by: Wojciech Macek <wma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10722
2017-05-17 15:53:13 +00:00
zbb
e17167eae3 Fix USB3.0 decoding windows on Armada38x
Set correct offset for MBUS windows configuration in
USB3.0 interface.

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: loos
Differential revision: https://reviews.freebsd.org/D10721
2017-05-17 15:52:04 +00:00
loos
3ed60ab875 Move the IO Window Control Register defines out of the ARMADA38X ifdef.
Fixes the build of Marvell kernels (other than ARMADA38X) after r318336.

Reported by:	mmel
2017-05-17 15:13:01 +00:00
loos
6eed58e1e7 Add the Marvell SDHCI controller to the list of supported devices in
sdhci_fdt.

Enable the SDHCI controller, bus and devices on ARMADA38X kernel.

Tested on:	ClearFog Pro
Reviewed by:	Marcin Wojtas <mw at semihalf.com>
Sponsored by:	Rubicon Communications, LLC (Netgate)
Differential Revision:	https://reviews.freebsd.org/D10606
2017-05-16 05:10:15 +00:00
loos
4137b139d9 Add the SDHCI Address Decoder registers and routines for ARMADA 38X.
Tested on:	ClearFog Pro
Reviewed by:	Marcin Wojtas <mw at semihalf.com>
Sponsored by:	Rubicon Communications, LLC (Netgate)
Differential Revision:	https://reviews.freebsd.org/D10601
2017-05-16 04:47:50 +00:00
zbb
7d6a36a63b Optimize Armada38x low-level MBUS settings
Add early init handler, which comprises various internal
bus optimisations for Armada 38x SoC's. Magic values used
due to undocumented registers.

Submitted by:	Marcin Wojtas <mw@semihalf.com>,
		Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Obtained from: Semihalf, Stormshield
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10219
2017-04-18 10:39:14 +00:00
zbb
a12ea9b1d6 Add PL310 platform initialization for Armada 38x
Introduce machine-dependent part of the arm/pl310 driver for
Armada 38x SoCs. Add prefetch and power savings configuration.

Submitted by: <arnaud.ysmal@stormshield.eu>
Obtained from: Stormshield
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10220
2017-04-18 10:32:21 +00:00
andrew
8222ebf941 Remove code for Marvell SoCs that lack a kernel config.
It seems to be old code from the armv6 project branch that never had a
kernel config.

Reviewed by:	mmel
Sponsored by:	ABT Systems Lrd
Differential Revision:	https://reviews.freebsd.org/D7166
2017-03-17 12:59:16 +00:00
imp
ce9844cd72 Convert PCIe Hot Plug to using pci_request_feature
Convert PCIe hot plug support over to asking the firmware, if any, for
permission to use the HotPlug hardware. Implement pci_request_feature
for ACPI. All other host pci connections to allowing all valid feature
requests.

Sponsored by: Netflix
2017-02-25 06:11:59 +00:00
mmel
ae5f530142 Remake support for SMP kernel on UP cpu:
- Use new option SMP_ON_UP instead of (mis)using specific CPU type.
   By this, any SMP kernel can be compiled with SMP_ON_UP support.
 - Enable runtime detection of CPU multiprocessor extensions only
   if SMP_ON_UP option is used. In other cases (pure SMP or UP),
   statically compile only required variant.
 - Don't leak multiprocessor instructions to UP kernel.
 - Correctly handle data cache write back to point of unification.
   DCCMVAU is supported on all armv7 cpus.
 - For SMP_ON_UP kernels, detect proper TTB flags on runtime.

Differential Revision: https://reviews.freebsd.org/D9133
2017-02-02 06:14:44 +00:00
andrew
78000f6960 Make fdt_pm_mask_table internal to the Marvell code, it's unued anywhere
else.

Sponsored by:	ABT Systems Ltd
2017-01-26 13:04:14 +00:00
wma
60cc8a6c2e Add dummy functions for Marvell SoC's not equipped with AHCI
Commit r312747 ("Setup decoding windows for ARMADA38X") resulted
in build failing for Marvell platforms, which don't have AHCI controller.
This patch provides a fix by adding dummy functions for such cases.

On the occasion rename register dump routine to decode_win_ahci_dump,
in order to avoid confusion.

Submitted by:          Marcin Wojtas <mw@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
2017-01-26 11:14:23 +00:00
wma
fe61d0f11b Add support for AHCI on ARMADA38X
This file provides support for AHCI mode on Armada38x
and adds new optional AHCI device to arm/mv/files.mv.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           zbb
Differential revision: https://reviews.freebsd.org/D9222
2017-01-25 10:34:37 +00:00
wma
505dcaf940 Setup decoding windows for ARMADA38X
It is necesarry to open memory windows on internal bus for
AHCI driver to work correctly.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           zbb
Differential revision: https://reviews.freebsd.org/D9220
2017-01-25 10:31:16 +00:00
wma
decc775027 Fix node detection for MBUS windows configuration
Configure decoding windows only for devices with
enabled nodes in FDT.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           zbb
Differential revision: https://reviews.freebsd.org/D9219
2017-01-25 10:29:46 +00:00
wma
600bb57f9b Introduce armada_thermal driver for Armada family platforms
* Currently supports only Armada38X family but other Marvell SoC's
  can be added if needed.
* Provides temperature is C deg.
* To print the temperature one can use:
  sysctl dev.armada_thermal.0.temperature

Submitted by:          Zbigniew Bodek <zbb@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Differential revision: https://reviews.freebsd.org/D9217
2017-01-25 06:08:10 +00:00
cem
b2000e56f9 "Buses" is the preferred plural of "bus"
Replace archaic "busses" with modern form "buses."

Intentionally excluded:
* Old/random drivers I didn't recognize
  * Old hardware in general
* Use of "busses" in code as identifiers

No functional change.

http://grammarist.com/spelling/buses-busses/

PR:		216099
Reported by:	bltsrc at mail.ru
Sponsored by:	Dell EMC Isilon
2017-01-15 17:54:01 +00:00
andrew
70755d9fd5 Use the correct OF_getencprop over OF_getprop + fdt32_to_cpu to read
integer data from the device tree.

Sponsored by:	ABT Systems Ltd
2016-11-14 12:03:08 +00:00
andrew
99881c494f Stop including fdt_common.h from the arm code when it's unneeded.
Sponsored by:	ABT Systems Ltd
2016-11-14 11:41:22 +00:00
andrew
7168ae84d8 Use the modern spelling of ofw_bus_node_is_compatible in sys/arm.
Sponsored by:	ABT Systems Ltd
2016-11-11 15:13:30 +00:00
mmel
e4f325a150 ARM: Remove unused includes.
MFC after: 1 week
2016-10-09 10:25:47 +00:00
mmel
023f0cfc57 ARM: SEV/WFE instructions are implemented starting from ARMv6K,
use it directly.

MFC after: 1 week
2016-10-06 13:18:18 +00:00
andrew
3bb796bc2c Split CPU_CORTEXA into CPU_CORTEXA8, for the Cortex-A8, and CPU_CORTEXA_MP,
for later Cortex-A CPUs that support the Multiprocessor Extensions. This
will be needed to support both in a single GENERIC kernel while still
being able to only build for a single SoC.

Reviewed by:	mmel
Relnotes:	yes
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D8138
2016-10-04 12:25:44 +00:00
andrew
dd73cf4cd9 Remove bus_dma_get_range and bus_dma_get_range_nb on armv6. We only need
this on a few earlier arm SoCs.

Reviewed by:	manu (earlier version)
Sponsored by:	ABT Systems Ltd
2016-09-23 12:38:05 +00:00
zbb
08f6ef2014 Use nitems() macro instead of re-inventing it
Fixed after r301221.

Pointed out by:	oshogbo
Submitted by:	Michal Stanek <mst@semihalf.com>
Obtained from:	Semihalf
2016-06-03 18:52:57 +00:00
zbb
b408dead16 Configure CPU window to second CESA SRAM
Check if there is a second CESA SRAM node in FDT and add a CPU window
for it. Define A38X specific macro for setting device attribute for
each node.

Submitted by:	Michal Stanek <mst@semihalf.com>
Obtained from:	Semihalf
Sponsored by:	Stormshield
Differential revision:	https://reviews.freebsd.org/D6216
2016-06-02 18:33:26 +00:00
zbb
4f50db8270 Map CESA SRAM memory in driver attach for Armada38x
On other platforms with CESA accelerator the SRAM memory is mapped in
early init before driver is attached. This method only works correctly
with mappings no smaller than L1 section size (1MB). There may be more
SRAM blocks and they may have smaller sizes than 1MB as is the case
for Armada38x. Instead, map SRAM memory with bus_space_map() in CESA
driver attach. Note that we can no longer assume that VA == PA for the
SRAM.

Submitted by:	Michal Stanek <mst@semihalf.com
Obtained from:	Semihalf
Sponsored by:	Stormshield
Differential revision:	https://reviews.freebsd.org/D6215
2016-06-02 18:31:36 +00:00
ian
8d8c35656e Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn't
have ACLE support built in.  The ACLE (ARM C Language Extensions) defines
a set of standardized symbols which indicate the architecture version and
features available.  ACLE support is built in to modern compilers (both
clang and gcc), but absent from gcc prior to 4.4.

ARM (the company) provides the acle-compat.h header file to define the
right symbols for older versions of gcc.  Basically, acle-compat.h does
for arm about the same thing cdefs.h does for freebsd: defines
standardized macros that work no matter which compiler you use.  If ARM
hadn't provided this file we would have ended up with a big #ifdef __arm__
section in cdefs.h with our own compatibility shims.

Remove #include <machine/acle-compat.h> from the zillion other places (an
ever-growing list) that it appears.  Since style(9) requires sys/types.h
or sys/param.h early in the include list, and both of those lead to
including cdefs.h, only a couple special cases still need to include
acle-compat.h directly.

Loves it:     imp
2016-05-25 19:44:26 +00:00
ian
2308d1c500 Use the new(-ish) CP15_SCTLR macro to generate system control reg accesses
where possible.  In the places that doesn't work (multi-line inline asm,
and places where the old armv4 cpufuncs mechanism is used), annotate the
accesses with a comment that includes SCTLR.  Now a grep -i sctlr can find
all the system control register manipulations.

No functional changes.
2016-05-23 20:07:17 +00:00
loos
f73b4006ff Fix the deciKelvin to Celsius conversion in kernel.
After r285994, sysctl(8) was fixed to use 273.15 instead of 273.20 as 0C
reference and as result, the temperature read in sysctl(8) now exibits a
+0.1C difference.

This commit fix the kernel references to match the reference value used in
sysctl(8) after r285994.

Sponsored by:	Rubicon Communications (Netgate)
2016-05-22 13:58:32 +00:00
skra
1f47b7e46f INTRNG - implement pic_post_filter method. This method is fundamental
one and must always be implemented for a PIC. There is no default for
it intentionally.
2016-05-22 11:42:34 +00:00
andrew
5755bcaba9 Return the struct intr_pic pointer from intr_pic_register. This will be
needed in later changes where we may not be able to lock the pic list lock
to perform a lookup, e.g. from within interrupt context.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-18 15:05:44 +00:00