2765 Commits

Author SHA1 Message Date
loos
9ad347c496 Moves all the duplicate code to a single function.
Verify for invalid modes and unwanted flags before pass the new flags to
driver.
2014-11-18 17:22:08 +00:00
imp
e1857bb370 These delays aren't needed. Elimate them. They should be on the order
of a few cycles at most, not 10us. They make it impossible to
implement half-duplex protocols that are faster than about 1KHz.

Sponsored by: Netflix
2014-11-18 17:07:02 +00:00
imp
e1fec13f7c opt_global.h is included automatically in the build. No need to
explicitly include it in these places.

Sponsored by: Netflix
2014-11-18 17:06:56 +00:00
ian
6ad03ffac9 Fix the i2c bus speed divisors for TI OMAP4 and AM335x.
For OMAP4, the old values for 1MHz gave a bus frequency of about 890KHz.
The new numbers hit 1MHz exactly.

For AM335x the prescaler values are adjusted to give a 24MHz clock for
all 3 standard speeds, as the manual recommends (as near as we can tell,
there are errors and typos apparent in the document).  Also, 1MHz speed
is added, and has been tested successfully on a BeagleboneWhite board.

PR:		195009
2014-11-18 03:26:52 +00:00
ian
496f752b1b Allow i2c bus speed to be configured via hints, FDT data, and sysctl.
The current support for controlling i2c bus speed is an inconsistant mess.
There are 4 symbolic speed values defined, UNKNOWN, SLOW, FAST, FASTEST.
It seems to be universally assumed that SLOW means the standard 100KHz
rate from the original spec.  Nothing ever calls iicbus_reset() with a
speed of FAST, although some drivers would treat it as the 400KHz standard
speed.  Mostly iicbus_reset() is called with the speed set to UNKNOWN or
FASTEST, and there's really no telling what any individual driver will do
with those.

The speed of an i2c bus is limited by the speed of the slowest device on
the bus.  This means that generally the bus speed needs to be configured
based on the board/system and the components within it.  Historically for
i2c we've configured with device hints.  Newer systems use FDT data and it
documents a clock-frequency property for i2c busses.  Hobbyists and
developers are likely to want on the fly changes.  These changes provide
all 3 methods, but do not require any existing drivers to change to use
the new facilities.

This adds an iicbus method, iicbus_get_frequency(dev, speed) that gets the
frequency for the requested symbolic speed.  If the symbolic speed is SLOW
or if there is no speed configured for the bus, the returned value is
100KHz, always.  Otherwise, if bus speed is configured by hints, fdt,
tunable, or sysctl, that speed is returned.  It also adds a helper
function, iicbus_init_frequency() that any bus driver subclassed from
iicbus can initialize the frequency from some other source of info.

Initial driver implementations are provided for Freescale and TI.

Differential Revision:        https://reviews.freebsd.org/D1174
PR:		195009
2014-11-18 01:54:31 +00:00
ian
1e819741bd No functional changes. Remove a couple outdated or inane comments and
add new comment blocks describing why the cache maintenance sequences are
done in the order they are for each case.
2014-11-16 21:39:56 +00:00
ian
4f437b4206 Correct the sequence of busdma sync ops involved with PRE/POSTREAD syncs.
We used to invalidate the cache for PREREAD alone, or writeback+invalidate
for PREREAD with PREWRITE, then treat POSTREAD as a no-op.  Prefetching on
modern systems can lead to parts of a DMA buffer getting pulled into the
caches while DMA is in progress (due to access of "nearby" data), so it's
mandatory to invalidate during the POSTREAD sync even if a PREREAD
invalidate also happened.

In the PREREAD case the invalidate is done to ensure that there are no
dirty cache lines that might get automatically evicted during the DMA,
corrupting the buffer.  In a PREREAD+PREWRITE case the writeback which is
required for PREWRITE handling is suffficient to avoid corruption caused
by eviction and no invalidate need be done until POSTREAD time.

Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-11-16 21:22:42 +00:00
ian
e38d3d57c6 Do the cache invalidate sequence from the outermost to innermost, required
for correct operation.

Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-11-16 20:59:27 +00:00
ian
958e1dabc1 Do not do a cache invalidate on a PREREAD sync that is also a PREWRITE sync.
The PREWRITE handling does a writeback of any dirty cachelines, so there's
no danger of an eviction during the DMA corrupting the buffer.  There will
be an invalidate done during POSTREAD, so doing it before the read too is
wasted time.
2014-11-16 20:55:51 +00:00
ian
fb2e4ef1cd Indent a couple lines properly and expand a comment. No functional changes. 2014-11-16 20:34:14 +00:00
ian
f8016fba1e Whitespace and comment tweaks, no functional changes. 2014-11-15 05:40:20 +00:00
ian
ba4a5e581c When doing busdma sync ops for BUSDMA_COHERENT memory, there is no need
for cache maintenance operations, but ensure that all prior writes have
reached memory when doing a PREWRITE sync.

Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-11-15 03:39:58 +00:00
ian
28615a880a Use the standard powerof2() macro from param.h instead of a local one.
Pointed out by:	 jhb@
2014-11-15 02:58:17 +00:00
zbb
d3fd5a5eeb Fix typo in ARM GIC device_printf()
Obtained from:   Semihalf
Sponsored by:    The FreeBSD Foundation
2014-11-13 21:37:53 +00:00
loos
8fddc417c9 Fix the error checking, broken on r273337, to _not_ ignore controller
errors.

Without this fix you can't even scan the bus (all operations will always
succeed).

MFC with:	r273337
Pointy hat to:	loos
2014-11-12 03:07:46 +00:00
ian
6810cd7aa8 Fix the reversed sense of the PADCONF_NONE test. 2014-11-12 02:44:27 +00:00
ian
bdbfad03b0 Bugfixes for the imx5/imx6 iomux fdt_pinctrl driver.
I originally overlooked a couple flag bits defined in the fdt binding docs.
One flag suppresses the pad configuration (pullup/pulldown/etc).  The other
one requires that the SION (set input on) flag be set in the mux register.

Also, it appears from the data involved that if the input register
address in the config tuple is zero, there is no input configuration.  The
old code was writing to register zero, which contains a collection of misc
control bits (having nothing to do with input configuration) that probably
shouldn't get overwritten arbitrarily.  The bindings doc doesn't explictly
mention this.
2014-11-12 02:37:27 +00:00
loos
b9caa44579 Since r273264 the SD card detection on Raspberry Pi is reliably working and
that expose new bugs with HS mode.

When the old code could not do the proper card detection it would boot with
lower defaults (and no HS mode) and this makes some HS cards boots.

Now, with the card always identified as HS capable, the sdhci controller
tries to run the card at HS speeds and makes the boot always fail.

Disable the HS mode for now (which still can be enabled with the tunable)
until it is properly fixed.

MFC with:	r273264
Requested by:	many
2014-11-11 23:55:37 +00:00
melifaro
b5d711d3a6 Renove faith(4) and faithd(8) from base. It looks like industry
have chosen different (and more traditional) stateless/statuful
NAT64 as translation mechanism. Last non-trivial commits to both
faith(4) and faithd(8) happened more than 12 years ago, so I assume
it is time to drop RFC3142 in FreeBSD.

No objections from:	net@
2014-11-09 21:33:01 +00:00
ian
a31b876e04 Strengthen the sanity checking of busdma tag parameters.
It turns out an alignment of zero can lead to an endless loop in the
vm reservations code, so specifically disallow that.  The manpage says
hardware which can do dma at any address should use a value of one, which
hints at the forbiddeness of zero without exactly saying it.  Several
other conditions which could lead to insanity in working with the tag are
also checked now.

Every existing call to bus_dma_tag_create() (about 680 of them) was
eyeballed for violations of these things, and two alignment=0 glitches
were fixed.  It's possible something was missed, but overall this
shouldn't lead to any arm users suddenly experiencing failures.
2014-11-06 19:14:58 +00:00
kevlo
134ada3646 Fix usage of kern_getenv(). 2014-10-31 15:07:51 +00:00
loos
7dd1b73c38 Make the GPIO children attach to the first unit available and not only to
unit 0.

It seems that this 'simplification' was copied to all GPIO drivers in tree.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.
2014-10-28 18:33:59 +00:00
kib
29a659ef8e Add fueword(9) and casueword(9) functions. They are like fuword(9)
and casuword(9), but do not mix value read and indication of fault.

I know (or remember) enough assembly to handle x86 and powerpc.  For
arm, mips and sparc64, implement fueword() and casueword() as wrappers
around fuword() and casuword(), which means that the functions cannot
distinguish between -1 and fault.

On architectures where fueword() and casueword() are native, implement
fuword() and casuword() using fueword() and casuword(), to reduce
assembly code duplication.

Sponsored by:	The FreeBSD Foundation
Tested by:	pho
MFC after:	2 weeks (ia64 needs treating)
2014-10-28 15:22:13 +00:00
ian
3aefca1073 Remove the ARM_DEVICE_MULTIPASS option and make its effect be the default.
Multipass device attachment was tested on many arm platforms by users and
only success was reported on the arm@ mailing list.  This is just the
long-delayed followup of making it the default.

Multipass attachment is necessary when using vendor-supplied FDT data,
because our devices may need to be attached in a different order than they
are described in the FDT data.
2014-10-26 18:30:35 +00:00
alc
dc84db712f By the time that pmap_init() runs, vm_phys_segs[] has been initialized. Obtaining
the end of memory address from vm_phys_segs[] is a little easier than obtaining it
from phys_avail[].

Discussed with:	Svatopluk Kraus
2014-10-26 17:56:47 +00:00
loos
8b84661d1f Add an iicbus_reset() method to bcm2835_bsc. While it is generally not
used for kernel devices it is used by i2c(8).

This fix the 'error: Device not configured' when i2c(8) tries to reset the
controller, as an example:

# i2c -r
Resetting I2C controller on /dev/iic0: error: Device not configured

For now use conservative settings for default i2c speeds.

MFC after:	1 week
2014-10-24 22:06:21 +00:00
loos
c2bbf09479 Fix cpsw_detach() to not panic when called from cpsw_attach().
For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY
and fails to attach calling cpsw_detach() which end up in a panic.

Fix it by doing the proper check before detach the miibus and also fix the
leak of few variables.

And to actually make it work, ether_ifattach() has to be moved to the end
of cpsw_attach() to avoid a race where calling ether_ifdetach() before
domain_init() (which will only run later on) would make it crash at
INP_INFO_RLOCK() on in_pcbpurgeif0().

Tested on:	BBB (am335x)
MFC after:	1 week
2014-10-24 21:08:02 +00:00
jhb
fcc57fff95 Add COMPAT_FREEBSD9 and COMPAT_FREEBSD10 options to wrap code that
provides compatability for FreeBSD 9.x and 10.x binaries.  Enable
these options in kernel configs that enable other COMPAT_FREEBSD<n>
options.
2014-10-24 19:58:24 +00:00
loos
6ab33f375c Fix a bug where DMA maps created with bus_dmamap_create() won't increment
the map count and without being able to keep track of the current map
allocation, bus_dma_tag_destroy() will fail to proceed and will return
EBUSY even after all the maps have been correctly destroyed with
bus_dmamap_destroy().

Found while testing the detach method of a NIC.

Tested on:	BBB (am335x)
Reviewed by:	cognet, ian
MFC after:	1 week
2014-10-24 19:18:39 +00:00
ian
d2d2282d51 Accept the documented FDT compatible string for the PL310 cache controller
as well as the non-standard string we've been using for a couple years.
2014-10-24 15:44:29 +00:00
ian
bc4f095bf4 Install a temporary workaround to avoid problems in fdt data with linux's
workaround for an imx6 chip erratum.  Linux works around the bug with
changes in fdt data that we can't currently handle, so to enable running
with standard vendor-supplied fdt data, this watches for an attempt to map
the gpio1_6 interrupt and remaps it back to the standard ethernet interrupt.

This can be undone when the intrng project is completed and our gpio drivers
can also be interrupt controllers.
2014-10-23 22:21:22 +00:00
ian
256fe85d82 Unconditionally enable the clocks for all imx6 devices that we have drivers
for, or that are required to run the chip (such as busses).  Turn off all
the devices we don't yet have drivers for.

Some day we will have a fully functional imx6 clock driver so that we can
manage clocks based on fdt data.  This will have to do until then.
2014-10-23 03:13:14 +00:00
br
81ed644a59 Provide a character device allowing us to access BERI memory regions.
Sponsored by:	DARPA, AFRL
2014-10-22 11:30:03 +00:00
br
6d77d39adc Add driver for Micrel KSZ9021 Gigabit Ethernet Transceiver (PHY).
Sponsored by:	DARPA, AFRL
2014-10-21 09:14:16 +00:00
hselasky
49c137f7be Fix multiple incorrect SYSCTL arguments in the kernel:
- Wrong integer type was specified.

- Wrong or missing "access" specifier. The "access" specifier
sometimes included the SYSCTL type, which it should not, except for
procedural SYSCTL nodes.

- Logical OR where binary OR was expected.

- Properly assert the "access" argument passed to all SYSCTL macros,
using the CTASSERT macro. This applies to both static- and dynamically
created SYSCTLs.

- Properly assert the the data type for both static and dynamic
SYSCTLs. In the case of static SYSCTLs we only assert that the data
pointed to by the SYSCTL data pointer has the correct size, hence
there is no easy way to assert types in the C language outside a
C-function.

- Rewrote some code which doesn't pass a constant "access" specifier
when creating dynamic SYSCTL nodes, which is now a requirement.

- Updated "EXAMPLES" section in SYSCTL manual page.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2014-10-21 07:31:21 +00:00
ian
75254491e5 Attach the imx6 CCM driver during BUS_PASS_CPU. It controls the clocks
for most on-chip devices and needs to be available before other drivers
start attaching and asking to have their clocks enabled.
2014-10-20 23:34:47 +00:00
ian
6fd6dd0843 The imx6 hardware is fast enough to make good use of however much
timecounter resolution is available, so ask for a 1 GHz frequency.  It
won't actually get one that fast, but that'll get the fastest available
clock and use a divisor of 1 (probably 132 or 66mhz on current hardware).
2014-10-20 23:32:34 +00:00
loos
3469ab2117 Fix the mtx_sleep() error checking, catch all errors and not only
EWOULDBLOCK.

Do not print any message at errors.  The errors are properly sent to upper
layers which should be able to deal with it, including printing the errors
when they need to.

The error message was quite annoying while scanning the i2c bus.

MFC after:	1 week
2014-10-20 18:04:20 +00:00
loos
8655ac8645 Add another wakeup() after actually set the bus as free.
This fix a race where the threads waiting for the bus would wake up early
and still see bus as busy.

While here, give a better description to wmesg for the two use cases we
have (bus and io waiting).

MFC after:	1 week
2014-10-20 13:36:52 +00:00
andrew
722d08c19b Allow the armv6 kernel to be build with PHYSADDR undefined. The kernel
will now find the virtual to physical mapping for libkvm to use at
runtime. This makes PHYSADDR redundant, however keep it around to give
everyone a chance to update their libkvm.

MFC after:	1 week
2014-10-19 21:03:42 +00:00
andrew
63825ea043 Allow libkvm to get the kernel va to pa delta without the need for
physaddr. This should allow for a kernel where PHYSADDR and KERNPHYSADDR
are both undefined.

For now libkvm will use the old method of reading physaddr and kernaddr
to allow it to work with old kernels. This could be removed in the future
when enough time has passed.

Differential Revision:	https://reviews.freebsd.org/D939
MFC after:	1 week
2014-10-19 20:23:31 +00:00
ian
6cd79c01dc Attach this driver during BUS_PASS_BUS and move the cpu init code to a
bus_new_pass() handler so it doesn't happen until BUS_PASS_CPU.  This allows
the anatop driver to outbid the generic simplebus driver (which the FDT
data describes as compatible).

Some day when we handle power regulators, this driver may actually
become a functional simplebus and attach the regulators as children, as
described in the FDT data.
2014-10-19 18:41:22 +00:00
rpaulo
ac5bd81fc6 Style changes as pointed out by stas@.
MFC after:	1 week
2014-10-19 17:55:04 +00:00
br
d6d9ee45cc Add driver for BERI soft processor 'ring buffer' device.
Ring device provides a way for communicate to BERI
peripherals such as BERI debug unit and console.

Sponsored by:	DARPA, AFRL
2014-10-19 16:26:49 +00:00
loos
073b7e1f4d Add a workaround needed to fix a bug of Arasan Host Controller where it may
lose the contents of consecutive writes (that happens within two SD card
clock cycles).

This fixes the causes of instability during the SD card detection and
identification on Raspberry Pi (which happens at 400 kHz and so was much
more vulnerable to this issue).

Remove the previous workaround which clearly can't provide the same effect.

MFC after:	1 week
Relnotes:	yes
2014-10-18 19:01:07 +00:00
loos
85f23d67de Fix the chan address for mtx_sleep() on bus wait. Without this fix the
threads waiting for the bus would never wake.

X-MFC-With: r270230
2014-10-18 18:27:24 +00:00
andrew
95ec3a85b3 Rework the Ti GPIO code to allow for both the OMAP4 and AM335X attachments
to be present. Thsi creates a new per-SoC driver that handles probe and
setting/getting the gpio flags.

Differential Revision:	https://reviews.freebsd.org/D943
Reviewed by:	loos, rpaulo
MFC after:	1 week
2014-10-18 17:51:34 +00:00
rpaulo
5e3149e8b3 Remove an unused mutex.
MFC after:	1 week
2014-10-18 17:36:57 +00:00
rpaulo
12cfd5c5b7 Make the ti_mbox and ti_pruss drivers optional.
MFC after:	1 week
2014-10-18 17:00:55 +00:00
rpaulo
dd5b16912c Add a driver for the TI watchdog.
The TI watchdog timer is present on BeagleBone's.  Since 2014, U-Boot
has been booting the BeagleBone with the watchdog enabled.  We need to
disable it on boot to avoid a spurious reset.
The timer isn't exactly precise, but it will do as a watchdog.  This
is also a reflection of the watchdog(9) API.

In the future, we could handle interrupts, but the watchdog(9) API
needs to be a bit smarter before that can happen.

Differential Revision:	https://reviews.freebsd.org/D965
Reviewed by:	andrew
MFC after:	1 week
Relnotes:	yes
2014-10-18 16:59:21 +00:00