Commit Graph

94 Commits

Author SHA1 Message Date
Marcel Moolenaar
eed142e1e9 Add default address for FLASH mapping on the boot bus.
Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:30:15 +00:00
Marcel Moolenaar
4699b5e472 Remove octeon_bootinfo from all files except octeon_machdep.c.
Use instead cvmx_sysinfo_get() consistently.

Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:17:43 +00:00
Marcel Moolenaar
9bcaa49a30 o Clean up some ID printfs, and put under bootverbose
o   Remove redundant lookups of base address in cf_identify
o   Fix some indenting issues
o   Fix an identification bug that uses DRQ to checlk for ident block
    returned. The correct spec is to look for BSY to be cleared.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 18:03:55 +00:00
Marcel Moolenaar
2873abdc12 Partially revert r224661:
octeon_ap_boot is not a bitmask. It holds the CPU Id of the
AP currently being started. As such there's no need to make
it a 64-bit integral and we're not limited to 64 CPUs.

Reported by: jmallet
Obtained from:	Andre Duane
2011-10-04 17:49:19 +00:00
Marcel Moolenaar
841fed3aa3 Make octeon_ap_boot 64 bits to handle MAXCPU up to 64.
Better construction of CPU mask in platform_cpu_mask().
Release cores still in reset when platform_start_ap() is called.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
Approved by: re (kib)
2011-08-05 22:54:42 +00:00
Attilio Rao
3bce356ea4 MFC 2011-06-04 22:05:20 +00:00
Warner Losh
dfa1a4fbf9 Add support for True IDE mode to the Octeon CF driver. This mode is
signalled when the attribute address for the CF is 0 in the octeon
sysinfo structure.  In this mode, the DATA port is 16-bits, but the
other ports are 8-bits, but on a 16-bit bus (so you have to access it
a short at a time, but only believe the lower byte).  See the code for
more details on this slightly odd arrangement.  I'm still not 100%
happy with the abstractions here on many levels (starting with the
globals for these settings, on down to no bus_space use, etc), but the
driver had these problems before the change.

Also, clean up the code a bit to make this support easier, and the
code a bit easier to read.  I tried to follow existing style, but may
have missed a few spots.  Add some comments.

Fix probe/attach routine to return a proper error for the simulator.

With this change, my EBH5200 eval board now recognizes the CF well
enough to boot to the login prompt.  Before it would say it never
became ready.  My CN3010-EVB-HS5 still boots properly.  My older
CN3860-based board won't load the 64-bit kernel, either before or
after the change, and I didn't chase that down.
2011-06-04 07:06:05 +00:00
Attilio Rao
f89d6b3f06 Fix a brain-o in platform_cpu_mask() by just specifying a possible
cpuset_t to be copied, rather than return the array.
I can't rely anymore on this being a simple int/long object.

Reported by:	art
2011-05-13 19:56:58 +00:00
Attilio Rao
245a253538 Add the cpuset_t conversion for mips. 2011-05-13 16:42:05 +00:00
Marius Strobl
3fcb7a5365 - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
  it might provide useful for debugging). For most mii(4) drivers it
  was unclear whether the PHYs driven by them actually support
  loopback or not. Moreover, typically loopback mode also needs to
  be activated on the MAC, which none of the Ethernet drivers using
  mii(4) implements. Given that loopback media has no real use (and
  obviously hardly had a chance to actually work) besides for driver
  development (which just loopback mode should be sufficient for
  though, i.e one doesn't necessary need support for loopback media)
  support for it is just dropped as both NetBSD and OpenBSD already
  did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
  instead of discrete function pointers, and extend this to include
  a "reset" entry point. Make sure any PHY-specific reset routine is
  always used, and provide one for lxtphy(4) which disables MII
  interrupts (as is done for a few other PHYs we have drivers for).
  This includes changing NIC drivers which previously just called the
  generic mii_phy_reset() to now actually call the PHY-specific reset
  routine, which might be crucial in some cases. While at it, the
  redundant checks in these NIC drivers for mii->mii_instance not being
  zero before calling the reset routines were removed because as soon
  as one PHY driver attaches mii->mii_instance is incremented and we
  hardly can end up in their media change callbacks etc if no PHY driver
  has attached as mii_attach() would have failed in that case and not
  attach a miibus(4) instance.
  Consequently, NIC drivers now no longer should call mii_phy_reset()
  directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
  The purpose of that function is to perform the common steps to attach
  a PHY driver instance and to hook it up to the miibus(4) instance and to
  optionally also handle the probing, addition and initialization of the
  supported media. So all a PHY driver without any special requirements
  has to do in its bus attach method is to call mii_phy_dev_attach()
  along with PHY-specific MIIF_* flags, a pointer to its PHY functions
  and the add_media set to one. All PHY drivers were updated to take
  advantage of mii_phy_dev_attach() as appropriate. Along with these
  changes the capability mask was added to the mii_softc structure so
  PHY drivers taking advantage of mii_phy_dev_attach() but still
  handling media on their own do not need to fiddle with the MII attach
  arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
  for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
  structure. Several PHY drivers require this information also after
  attaching and previously had to wrap their own softc around mii_softc.
  NetBSD/OpenBSD also keep track of the model and revision on their
  mii_softc structure. All PHY drivers were updated to take advantage
  as appropriate.
- Convert the mebers of the MII data structure to unsigned where
  appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
  when mapping an OUI to the MII ID registers. All PHY drivers and
  miidevs where changed as necessary. Actually this now again allows to
  largely share miidevs with NetBSD, which fixed this problem already
  9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
  weren't explicitly converted to support flow control before. It's
  unclear whether flow control actually works with these but typically
  it should and their net behavior should be more correct with these
  changes in place than without if the MAC driver sets MIIF_DOPAUSE.

Obtained from:	NetBSD (partially)
Reviewed by:	yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
Juli Mallett
e22b8a5a3b o) Set MAC addresses starting at the MAC base for all management ports, not
just the MR-730.
o) Start MAC addresses for the non-management ports after the management ports.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 22:51:34 +00:00
Juli Mallett
26de5f20cc o) Tear down receive interrupt on detach.
Submitted by:	Bhanu Prakash
2011-03-16 08:56:22 +00:00
Juli Mallett
64974004ec o) Clean up FPA pools on module unload.
o) Allocate output buffer pool based on available output queues.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 08:51:36 +00:00
Juli Mallett
cb2096acbf The Lanner MR-730 uses the first two MACs at its MAC base for the 10/100
management ports, and gigabit ports start at an offset of 2 from the MAC
base.
2011-02-12 02:41:33 +00:00
Juli Mallett
1591f3f18c Allow the platform code to return a bitmask of running cores rather than just
a number of cores, this allows for a sparse set of CPUs.  Implement support
for sparse core masks on Octeon.

XXX jeff@ suggests that all_cpus should include cores that are offline or
    running other applications/OSes, so the platform API should be further
    extended to allow us to set all_cpus to include all cores that are
    physically-present as opposed to only those that are running FreeBSD.

Submitted by:	Bhanu Prakash (with modifications)
Reviewed by:	jchandra
Glanced at by:	kib, jeff, jhb
2011-02-12 02:08:24 +00:00
Juli Mallett
2e2b4ad457 If there is no WQE available for a packet that needs segmentation, drop it
and return.
2011-01-20 23:51:03 +00:00
Juli Mallett
3e46966ed3 Remove some compile-time options from the driver, particularly async IOBDMA
support which is unused on FreeBSD and which complicates working on the
code now, can easily be added back later by someone determined to use it.
2011-01-20 23:34:59 +00:00
Oleksandr Tymoshenko
eb46a7a590 Fix build by changing format for size_t to %jd 2011-01-20 05:44:36 +00:00
Juli Mallett
2a05a35c57 Don't do a device_identify to add uart0, it's already hinted.
Reported by:	imp
2011-01-19 07:06:28 +00:00
Warner Losh
f381c26847 Save the CPU model, the board and the CPU clock rate so they are reported by
the approrpiate sysctl.
2011-01-17 23:03:09 +00:00
John Baldwin
58ccf5b41c Remove unneeded includes of <sys/linker_set.h>. Other headers that use
it internally contain nested includes.

Reviewed by:	bde
2011-01-11 13:59:06 +00:00
Juli Mallett
610803e3f5 Initialize PCIe buses and add preliminary support for 64-bit BARs. 2011-01-11 02:37:58 +00:00
Juli Mallett
449cf853ac Count output bytes and packets. 2011-01-10 22:14:30 +00:00
Juli Mallett
b37ccb6a0c Shorten device name so it fits into vmstat -i. 2011-01-10 22:14:08 +00:00
Juli Mallett
b15aff0da5 o) Free mbufs in error cases.
o) Clear/acknowledge receive interrupt at end of thread.  This gives the
   management interfaces performance on the order of 100Mbps rather than
   the previous level of 10Mbps on my MR-730.
2011-01-10 06:46:18 +00:00
Juli Mallett
15fe2454ae o) Expand the CIU driver to be aware of newly-allocated parts of the IRQ range.
o) Add 'octm', a trivial driver for the 10/100 management ports found on some
   Octeon systems.
o) Make the Simple Executive's management port helper routines compile on
   FreeBSD (namely by not doing math on void pointers.)
o) Add a cvmx_mgmt_port_sendm routine to the Simple Executive to send an mbuf
   so there is only one copy in the transmit path, rather than having to first
   copy the mbuf to an intermediate buffer and then copy that to the Simple
   Executive's transmit ring.
o) Properly work out MII addresses of management ports on the Lanner MR-730.
   XXX The MR-730 also needs some patches to the MII read/write routines, but
       this is sufficient for now.  Media detection will be fixed in the future
       when I can spend more time reading the vendor-supplied patches.
2011-01-10 03:48:41 +00:00
Juli Mallett
987da28eb7 Now that we correctly enable rx interrupts on all cores, performance has gotten
quite awful, because e.g. 4 packets will come in and get processed on 4
different cores at the same time, really battling with the TCP stack quite
painfully.  For now, just run one task at a time.

This gets performance up in most cases to where it was before the correctness
fixes that got interrupts to run on all cores (except in high-load TCP transmit
cases where all we're handling receive for is ACKs) and in some cases it's
better now.  What would be ideal would be to use a more advanced interrupt
mitigation strategy and possibly to use different workqueue groups per port for
multi-port systems, and so on, but this is a fine stopgap.
2011-01-09 23:46:24 +00:00
Juli Mallett
529fb1406b o) Remove some unused local definitions of IP protocol numbers.
o) Use CPU_FOREACH rather than a miscrafted for loop with an off-by-one to
   enable workq interrupts on all cores.
2011-01-09 23:05:46 +00:00
Juli Mallett
7b62328843 o) Add MIPS_COP_0_EXC_PC accessors to <machine/cpufunc.h>.
o) Make the octeon_wdog driver work on multi-CPU systems and to also print more
   information on NMI that may aid debugging.  Simplify and clean up internal
   API and structure.
2011-01-04 02:33:48 +00:00
Juli Mallett
5308af6337 o) Unmask Central Interrupt Unit interrupts on APs, too.
o) There's no good reason to make the low bits of the ebase the core
   number.  While per-CPU exception bases would be nice, for now we just
   need to make ebase the same on all cores.
2011-01-04 02:11:03 +00:00
Juli Mallett
1dadcedcfc When allocating memory from bootmem for the kernel to use, try to leave about
2MB of memory in the bootmem allocator for the SDK to use internally at a later
point.  It'd be nice if there were some functions we could call before
allocating memory to let various facilities reserve some memory, but for now
this seems sufficient.  Previously some unfortunate systems could give up all
(or at least most) of their memory to the kernel from bootmem, and then
allocating command queues for packet output and the like would fail later in
the boot process (which in turn would lead to crashes even later.)

Reported by:	kan
2010-12-28 20:11:54 +00:00
Juli Mallett
4a7b75273b o) Add support for the Lanner MR-321X/MR-325, which is just a modified MR-320.
o) On the Lanner MR-730, disable PCIe lane swap, per vendor.
2010-12-16 07:20:38 +00:00
Oleksandr Tymoshenko
bd01e50ca0 - dump_avail layout should be sequence of [start, end)
pairs, not <start, size>.

Spotted by: alc@
2010-12-09 07:47:40 +00:00
Oleksandr Tymoshenko
99629fa36d - Populate dump_avail with proper values from phys_avail 2010-12-09 07:01:03 +00:00
Juli Mallett
648260edcc Add interrupt describing and binding to CIU. 2010-12-01 05:24:29 +00:00
Juli Mallett
074a0a8d57 Run all poll requests through a single function that can either do the generic
link state polling or media-specific ones, while avoidiing changing link state
on interfaces that use miibus; this substantially speeds up link time on
interface (re)initialization.
2010-11-30 07:14:05 +00:00
Juli Mallett
6d903e0c7a Display some Octeon 2 features and a feature for distinguishing between PCIe
implementations.
2010-11-30 01:27:54 +00:00
Juli Mallett
b8248487b3 Don't free the work queue entry that we're using to hold the scatter-gather
list on exit from the transmit path.  The scatter-gather list itself can be
asynchronously DMAed to the transmit hardware, and we could actually lock up
the transmitter if any of a number of races around this were lost.

Instead, let the PKO free the scatter-gather list when it is done with it, and
use the "i" bit in each segment of the packet to avoid having them go into the
FPA.

This fixes an unrecoverable transmit stall under transmit load.

MFC after:	3 days
2010-11-29 21:04:00 +00:00
Juli Mallett
04b6fa8330 Merge Cavium Octeon SDK 2.0 Simple Executive; this brings some fixes and new
facilities as well as support for the Octeon 2 family of SoCs.

XXX Note that with our antediluvian assembler, we can't support some Octeon 2
    instructions and fall back to using the old ones instead.
2010-11-28 08:18:16 +00:00
Oleksandr Tymoshenko
006d0f38be - Add watchdog driver for Cavium Octeon. At the moment only
UP systems are supported.
2010-11-28 08:11:05 +00:00
Juli Mallett
34e3f53b7c o) Remove some commented out or unimplemented code.
o) Remove some options that are configurable on Linux but not FreeBSD.
o) Centralize open/poll/stop routines for XAUI and SGMII and use the common
   uninit routine directly rather than providing a wrapper for it.  The init
   functions for these interfaces are now identical and the common init routine
   could merge in setting those function pointers except that some hardware
   seems to use no open/poll/stop method?
2010-11-28 05:57:24 +00:00
Juli Mallett
ed11b5abe1 Remove unused and broken code to implement POW send and POW-only devices; a
separate POW driver makes more sense, generally.
2010-11-28 00:26:08 +00:00
Juli Mallett
25b0900026 Use if_transmit to avoid ifq locking in transmit path. 2010-11-27 22:42:41 +00:00
Warner Losh
161b83b959 Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mips
mipsel' or 'machine mips mipseb' into the config file (with a few 64's
tossed in for good measure).  This will let us build the proper
kernels with different worlds as part of make universe.
2010-11-13 22:34:12 +00:00
Juli Mallett
4ad7c12b2c Don't attach the PCI bus driver if the board we're being run on has PCIe. The
two are mutually-exclusive on Octeon.
2010-11-03 23:29:52 +00:00
Juli Mallett
bc41e12963 Declare the CF GEOM class so that g_modevent will get called, the class will
be recorded, etc.  This fixes libgeom on Octeon.
2010-11-02 23:43:44 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
Juli Mallett
2bcbafd6be Keep polling at 50hz as long as link state is changing. 2010-10-13 21:45:56 +00:00
Juli Mallett
f05957f7c6 o) Make it possible to attach a PHY directly to an octe device rather than
using miibus, since for some devices that use multiple addresses on the bus,
   going through miibus may be unclear, and for devices that are not standard
   MII PHYs, miibus may throw a fit, necessitating complicated interfaces to
   fake the interface that it expects during probe/attach.
o) Make the mv88e61xx SMI interface in octe attach a PHY directly and fix some
   mistakes in the code that resulted from trying too hard to present a nice
   interface to miibus.
o) Add a PHY driver for the mv88e61xx.  If attached (it is optional in kernel
   compiles so the default behavior of having a dumb switch is preserved) it
   will place the switch in a VLAN-tagging mode such that each physical port
   has a VLAN associated with it and interfaces for the VLANs can be created to
   address or bridge between them.
   XXX It would be nice for this to be part of a single module including the
       SMI interface, and for it to fit into a generic switch configuration
       framework and for it to use DSA rather than VLANs, but this is a start
       and gives some sense of the parameters of such frameworks that are not
       currently present in FreeBSD.  In lieu of a switch configuration
       interface, per-port media status and VLAN settings are in a sysctl tree.
   XXX There may be some minor nits remaining in the handling of broadcast,
       multicast and unknown destination traffic.  It would also be nice to go
       through and replace the few remaining magic numbers with macros at some
       point in the future.
   XXX This has only been tested with the MV88E6161, but it should work with
       minimal or no modification on related switches, so support for probing
       them was included.

Thanks to Pat Saavedra of TELoIP and Rafal Jaworowski of Semihalf for their
assistance in understanding the switch chipset.
2010-10-13 09:17:44 +00:00
Juli Mallett
a22b69b772 o) Allow devices to override the MDIO read and write functions presented to
the miibus attached to octe interfaces.
o) Add an SMI/MDIO interface to the MV88E61XX and use it for the switch PHY on
   the Lanner MR-320.  An actual driver for the switch PHY will come later.
   Note that for now it intercepts and fakes MII_BMSR reads to prevent the
   miibus from talking to anything but the switch itself.
2010-10-02 05:43:17 +00:00