Commit Graph

9 Commits

Author SHA1 Message Date
andreast
a98a74c774 Remove unused variables. Spotted by a cppcheck
(devel/cppcheck, http://sourceforge.net/projects/cppcheck) run.

Approved by: nwhitehorn (mentor)
2011-01-20 20:23:03 +00:00
nwhitehorn
c523c0e84e Correct parsing of the cpcht ranges property.
Submitted by:	andreast
MFC after:	2 weeks
2011-01-20 15:02:51 +00:00
nwhitehorn
21a8f93615 Allow access to the HT I/O port space on the IBM CPC9X5 northbridge chips.
MFC after:	2 weeks
2010-10-30 23:09:56 +00:00
nwhitehorn
d7c1d40d53 Configure interrupts on SMP systems to be distributed among all online
CPUs by default, and provide a functional version of BUS_BIND_INTR().
While here, fix some potential concurrency problems in the interrupt
handling code.
2010-06-23 22:33:03 +00:00
nwhitehorn
b877c685c2 Add MSI support for PCI devices attached to the CPC925 and CPC945 bridges
found in Apple and IBM G5 systems.
2010-06-18 17:39:56 +00:00
nwhitehorn
c757ee90ae Provide for multiple, cascaded PICs on PowerPC systems, and extend the
OFW interrupt map interface to also return the device's interrupt parent.

MFC after:	8.1-RELEASE
2010-06-18 14:06:27 +00:00
nwhitehorn
e720d3461e Correct a typo.
Pointy hat to:	me
2010-05-19 01:37:47 +00:00
nwhitehorn
95e9f935c7 Add support for the U4 PCI-Express bridge chipset used in late-generation
Powermac G5 systems. MSI and several other things are not presently
supported.

The U3/U4 internal device support portions of this change were contributed
by Andreas Tobler.

MFC after:	1 week
2010-05-16 15:18:25 +00:00
nwhitehorn
ef1e56b6d4 Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by:    grehan
2009-04-04 00:22:44 +00:00