Commit Graph

147 Commits

Author SHA1 Message Date
Pedro F. Giffuni
3b6f4eae15 gas: Implement the .inst assembler directive for arm.
We normally use the binutils from ports but on other systems this
is required for building gcc 4.9.

Obtained from:	OpenBSD (CVS rev. 1.5)
MFC after:	3 weeks
2016-05-20 20:01:10 +00:00
Pedro F. Giffuni
2c9dee79ef gas/config/tc-arm.c: Minor re-sorting to match upstream history.
No functional change.

MFC after:	2 weeks
2016-05-20 15:14:38 +00:00
Dimitry Andric
a0c1575d2f In GNU as, avoid left-shifting negative integers, which is undefined.
MFC after:	3 days
2015-08-09 11:06:40 +00:00
Baptiste Daroussin
1d0f6813ac Remove pregenerated text version of the texinfo documentation 2015-03-02 17:25:03 +00:00
Baptiste Daroussin
7bb36fb551 Generate manpage out of the texinfo files using texi2mdoc 2015-03-02 17:20:34 +00:00
Baptiste Daroussin
bbb0fbde9a Add pregenerated documentation for as(1) and ld(1) 2015-01-04 00:58:30 +00:00
Baptiste Daroussin
321f9e5ad9 Fix generating documents with modern texinfo 2015-01-04 00:44:24 +00:00
Dimitry Andric
efabc957c5 In contrib/binutils/gas/config/tc-ppc.c, fix a few -Wformat-security
warnings.

MFC after:	3 days
2014-12-28 21:06:03 +00:00
Pedro F. Giffuni
e63365a089 Backport fix for binutils 11867: .quad directive not assembled correctly
Alan Modra (and Alan's employer) graciously permitted use of his patch
under GPLv2.

Obtained from:	OpenBSD
MFC after:	5 days
2014-12-26 04:33:53 +00:00
Pedro F. Giffuni
32d0bb7e1b gas: use memmove instead of bogus memcpy.
partial_where points into the buffer that begins with buffer_start
so we need to use memmove() to handle the overlap.
Sourceware-PR 11456.

Obtained from:	OpenBSD (CVS rev. 1.2)
MFC after:	3 days
2014-12-26 03:03:41 +00:00
Justin Hibbits
e5701220a8 Make gas parse '__tls_get_addr(foo@tlsgd)'.
Corresponds to 727fc41e077139570ea8b8ddfd6c546b2a55627c.

This allows us to use -no-integrated-as with clang, if we prefer.

Obtained from:	binutils-gdb (Relicensed from Alan Modra as GPLv2)
MFC after:	2 weeks
X-MFC-with:	r275718
2014-12-18 03:12:46 +00:00
Andrew Turner
6ed7db33bc Fix mrc and mrc2 with APSR_nzcv. Binutils encodes it internally as 0 where
we need it to be set to 15 for it to be equivalent to r15.

MFC after:	1 week
X-MFC with:	r275415
Sponsored by:	ABT Systems Ltd
2014-12-07 21:47:19 +00:00
Andrew Turner
06b6b5da5e Allow the UAL APSR_nzcv format for the mrc and mrc2 instructions. The clang
integrated assembler only allows these forms so binutils will need to
support them.

MFC after:	1 Week
Sponsored by:	AB Systems Ltd
2014-12-02 18:12:16 +00:00
Dimitry Andric
5008830b51 Avoid undefined behaviour in gas's rotate_left() macro for n == 0.
Otherwise, clang can effectively remove the first iteration of the for
loops where this macro is invoked, and as a result, "cmp r0, #99" fails
to assemble.

Obtained from:	joerg at netbsd
MFC after:	3 days
2014-11-22 16:30:31 +00:00
Baptiste Daroussin
66c8095956 Rename elf*-powerpc into elf*-powerpc-freebsd in binutils
The powerpc support was the only supported architecture not prepending the elf format name
with "-freebsd" in base this change makes it consistent with other architectures.
On newer version of binutils the powerpc format is also prepended with "-freebsd".

Also modify the kernel ldscripts in that regards.

As a result it is now possible cross build the kernel on powerpc using newer binutils

Differential Revision:	https://reviews.freebsd.org/D926
Differential Revision:	https://reviews.freebsd.org/D928
2014-10-10 06:24:09 +00:00
Andrew Turner
657be2acf7 Add movw and movt relocations to the list of relocations against function
names that must nnot be adjusted. This fixes a bug where code such as:
movw r2, :lower16:symbol
movt r2, :upper16:symbol

It is common for clang to generate such code when targeting armv7.
2014-10-04 13:14:37 +00:00
Andrew Turner
0162755064 Allow vld and vst instructions to use the canonical form from ARM ARM when
including an alignment. Previously binutils would only allow instructions
in the form "vld1.64 {d0, d1}, [r0, :128]" where the final comma should
not be there, instead the above instruction should be
"vld1.64 {d0, d1}, [r0:128]".

This change duplicates the alignment code from within the function to
handle this case.
2014-10-03 15:07:43 +00:00
Andrew Turner
cb08295d5d Add all the dmb/dsb optional limitations, including the alternative values.
These are needed for some code llvm generates when targeting ARMv7.
2014-10-03 12:20:37 +00:00
Andrew Turner
671302a908 Allow the optional limitation on dmb instructions as is already the case
with dsb instructions.
2014-10-03 12:14:19 +00:00
Ian Lepore
2d0ef32f84 Teach as(1) to handle the arm .arch_extension pseudo-op, which accepts
the same values as the -march= command line option.  Add support for the
"sec" extension (security extensions).

We've been getting away without support for the sec extension because
it's bogusly enabled even on arches where its presence is optional.  This
support for .arch_extension is being added mainly so that we can use the
right directives in our source code, and that helps folks using external
toolchains (and will help us when we finally update our toolchain).
2014-08-01 20:30:24 +00:00
Ian Lepore
b7ea64e98d Fix an bug in as(1) parsing of arm -march=arch+ext options. Compare the
arch name to just the characters before the '+' in 'arch+ext'.
2014-08-01 20:21:41 +00:00
Justin Hibbits
1d5f07dc97 Make gas accept any PowerPC instruction by default. This is a local change,
and will not be submitted upstream.

Discussed with:	nwhitehorn,rdivacky
MFC after:	1 month
2014-02-03 01:45:07 +00:00
Pedro F. Giffuni
887bf737ad binutils: add support for Intel SMAP-related instructions
Add support for stac/clac instructions to manipulate the flag
that controls the behaviour of Intel's Supervisor Mode Access
Prevention (SMAP) feature.

Tested by:	dim
Obtained from:	OpenBSD
MFC after:	5 days
2014-01-26 00:37:21 +00:00
Marcel Moolenaar
e153be43ae Fix cross-compilation of ia64 target code with clang. 2013-12-28 22:52:46 +00:00
Sean Bruno
06dce123b6 Queisce warning about empty bodies in these loops by bumping the ;; to the
next line.
2013-10-29 20:35:28 +00:00
Ed Maste
9773a1f20f Don't force 64-bit DWARF2 on MIPS
64-bit debug data is only necessary for objects with greater than 4GB of
debug data, and is not used on other 64-bit FreeBSD targets.

Sponsored by:	DARPA, AFRL
2013-10-21 20:38:02 +00:00
Andrew Turner
9bff0a1d6a Merge from projects/arm_eabi_vfp r255380:
Fix the VCVT instruction. It must round towards zero when converting from
a floating-point to an integer value. This was not the case causing issues
when printing certain values.

There is a VCVTR instruction that will round depending on the current
rounding mode. We don't yet support this instruction, or setting the
rounding mode.
2013-10-20 15:13:32 +00:00
Ed Maste
1b182736a6 Fix .debug_line prologue header length calculation for 64-bit DWARF
The header_length field is the number of bytes following the field to
the first byte of the line number program.  The hard-coded constants
previously here (4 + 2 + 4) were correct only for 32-bit DWARF.

Sponsored by:	DARPA, AFRL
2013-10-17 17:25:00 +00:00
John Baldwin
dffe0dc4d2 Add support for the 'invpcid' instruction to binutils and DDB's
disassembler on amd64.

MFC after:	1 month
2013-09-03 21:21:47 +00:00
Andrew Turner
fbc66a3be6 Silence a warning that is incorrect on ARMv6 and later. In the smull, umull,
smlal, and umlal the output registers are allowed to be the same as either
input registers, where in ARMv4 and ARMv5 they could only be the same as the
last input register.
2013-08-17 14:36:32 +00:00
Andrew Turner
da6b2089d5 do_vfp_vmrs and do_vfp_vmsr should not return anything. 2013-03-18 15:14:36 +00:00
Andrew Turner
e8dde80b1d Add support for the vmsr and vmrs instructions. This supports the system
level version of the instructions. When used in userland the hardware only
allows us to read/write FPSCR.
2013-03-18 08:22:35 +00:00
Andrew Turner
90ab443e31 Some ARM vmov similar to 'vmov.f32 s1, s2' will incorrectly have the second
register added to the symbol table by the assembler. On further
investigation it was found the problem was with the my_get_expression
function. This is called by parse_big_immediate.

Fix this by moving the call to parse_big_immediate to the end of the if,
else if, ..., else block.
2013-03-18 07:41:08 +00:00
Andrew Turner
e63b930908 Clear the memory allocated to build the unwind tables. This fixes C++
exceptions on ARM EABI with static binaries.
2013-02-27 06:53:15 +00:00
John-Mark Gurney
c9ad522755 add support for AES and PCLMULQDQ instructions to binutils...
Thanks to Mike Belopuhov for the pointer to the OpenBSD patch, though
OpenBSD's gcc is very different that it only helped w/ where to modify,
not how...  Thanks to jhb for some early reviews...

Reviewed by:	imp, kib
MFC after:	1 month
2013-02-19 21:35:17 +00:00
Andrew Turner
384f99dea7 Recognise vfpv2 as a value for the ARM .fpu asm directive. Clang generates
these even when building soft floating-point code

Submitted by:	Daisuke Aoyama <aoyama AT peach.ne.jp>
2012-12-15 21:12:13 +00:00
Oleksandr Tymoshenko
4da573d910 Merging of projects/armv6, part 3
r238211:
Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb

This adds a new TARGET_ARCH for building on ARM
processors that support the ARMv6K multiprocessor
extensions.  In particular, these processors have
better support for TLS and mutex operations.

This mostly touches a lot of Makefiles to extend
existing patterns for inferring CPUARCH from ARCH.
It also configures:
 * GCC to default to arm1176jz-s
 * GCC to predefine __FreeBSD_ARCH_armv6__
 * gas to default to ARM_ARCH_V6K
 * uname -p to return 'armv6'
 * make so that MACHINE_ARCH defaults to 'armv6'
It also changes a number of headers to use
the compiler __ARM_ARCH_XXX__ macros to configure
processor-specific support routines.

Submitted by:	Tim Kientzle <kientzle@freebsd.org>
2012-08-15 03:21:56 +00:00
John Baldwin
11a08d62da Add support for the 'invept' and 'invvpid' instructions. Beyond simply
adding appropriate table entries, the assembler had to be adjusted as
these are the first non-SSE instructions to use a 3-byte opcode (and a
mandatory prefix to boot).

MFC after:	1 month
2012-07-06 14:28:18 +00:00
John Baldwin
22f9e86238 Add support for the 'xsave', 'xrstor', 'xsaveopt', 'xgetbv', and 'xsetbv'
instructions.  I reimplemented this from scratch based on the Intel
manuals and the existing support for handling the fxsave and fxrstor
instructions.  This will let us use these instructions natively with GCC
rather than hardcoding the opcodes in hex.

Reviewed by:	kib
MFC after:	1 month
2012-07-04 22:12:10 +00:00
Dimitry Andric
6a4ba2279d Make GNU as recognize the ARM 'rrx' mnemonic, which can be generated by
clang for certain expressions.  Code taken from Apple cctools (GPLv2).

Submitted by:	damjan.marion@gmail.com
2011-06-23 20:54:44 +00:00
Ben Laurie
5f301949ef Fix clang warnings.
Approved by:	philip (mentor)
2011-06-18 13:56:33 +00:00
Ben Laurie
eb838be1a5 Fix clang warnings.
Approved by:	philip (mentor)
2011-05-22 22:15:42 +00:00
Dimitry Andric
e3c77b8170 For ia64, add a proper 'elf64-ia64-freebsd' output format to BFD, so the
ELF branding for FreeBSD is done in the same way as amd64, i386 and
sparc.  Something similar should probably also be done for arm, mips and
powerpc.
2010-12-05 20:24:22 +00:00
Dimitry Andric
97d40d3d4a Merge ^/vendor/binutils/dist@214571 into contrib/binutils, which brings
us up to version 2.17.50.20070703, at the last GPLv2 commit.

Amongst others, this added upstream support for some FreeBSD-specific
things that we previously had to manually hack in, such as the OSABI
label support, and so on.

There are also quite a number of new files, some for cpu's (e.g. SPU)
that we may or may not be interested in, but those can be cleaned up
later on, if needed.
2010-11-01 19:35:33 +00:00
Dimitry Andric
dfd2f2d4bb Merge ^vendor/binutils/dist@214082 into contrib/binutils. 2010-10-21 19:11:14 +00:00
Dimitry Andric
c9a933bd0b Merge ^vendor/binutils/dist@214033 into contrib/binutils.
The change made to bfd/elf.c in upstream revision 1.217.4.3 (which was a
revert of an earlier change), caused objcopy on powerpc to fail to copy
debug info from kernel modules.  This had to be fixed by applying the
diff from upstream revision 1.243 on top of it.
2010-10-19 20:14:32 +00:00
Dimitry Andric
d1728c43cb Merge ^vendor/binutils/dist@213996 into contrib/binutils. Skip adding
any files we do not need, delete some files that were removed upstream,
but keep our own customizations and backports from later binutils.
2010-10-18 20:57:43 +00:00
Juli Mallett
5619a3e4bf Add/improve mips64r2, Octeon, n32 and n64 support in the toolchain.
o) Add TARGET_ABI to the MIPS toolchain build process.  This sets the default
   ABI to one of o32, n32 or n64.  If it is not set, o32 is assumed as that is
   the current default.
o) Set the default GCC cpu type to any specified TARGET_CPUTYPE.  This is
   necessary to have a working "cc" if e.g. mips64 is specified, as binutils
   will refuse to link objects using different ISAs in some cases.
o) Add support for n32 and n64 ABIs to binutils and GCC.
o) Add additional required libgcc2 stubs for n32 and n64.
o) Add support for the "mips64r2" architecture to GCC.  Add the "octeon"
o) When static linking, wrap default libraries in --start-group and
   --end-group.  This is required for static linking to work on n64 with the
   interdependencies between libraries there.  This is what other OSes that
   support n64 seem to do, as well.
o) Fix our GCC spec to define __mips64 for 64-bit targets, not __mips64__, the
   former being what libgcc, etc., check and the latter seemingly being a
   misspelling of a hand merge from a Linux spec.
o) When no TARGET_CPUTYPE is specified at build time, make GCC take the default
   ISA from the ABI.  Our old defaults were too liberal and assumed that 64-bit
   ABIs should default to the MIPS64 ISA and that 32-bit ABIs should default to
   the MIPS32 ISA, when we are supporting or will support some systems based on
   earlier 32-bit and 64-bit ISAs, most notably MIPS-III.
o) Merge a new opcode file (and support code) from a later version of binutils
   and add flags and code necessary to support Octeon-specific instructions.
   This should also make merging opcodes for other modern architectures easier.

Reviewed by:	imp
2010-06-02 11:06:03 +00:00
David E. O'Brien
f51ee0a16d Rename vendor/binutils/*/contrib to vendor/binutils/*/x
Binutils has a "contrib" subdirectory - thus flattening cannot happen
without renaming the upper level contrib directory in a first pass.

Also, don't record this move and remove any keyword expansion.
2009-01-19 17:25:17 +00:00
Warner Losh
d9964624bd Push mips support into the tree. 2008-12-11 08:22:20 +00:00