Commit Graph

197354 Commits

Author SHA1 Message Date
dim
fed0da0559 Add Makefile glue to build the Sparc backend libraries and link them
into the clang executable.
2014-02-20 22:22:39 +00:00
dim
71b05635f0 Import a whole bunch of clang trunk commits to enable self-hosting clang
3.4 on Sparc64 (commit descriptions left out for brevity):

r198311 r198312 r198911 r198912 r198918 r198923 r199012 r199034 r199037
r199188 r199399 r200452

Submitted by:	rdivacky
2014-02-20 21:59:15 +00:00
dim
882a15c9c2 Import a whole bunch of llvm trunk commits to enable self-hosting clang
3.4 on Sparc64 (commit descriptions left out for brevity):

r196755 r198028 r198029 r198030 r198145 r198149 r198157 r198565 r199186
r199187 r198280 r198281 r198286 r198480 r198484 r198533 r198567 r198580
r198591 r198592 r198658 r198681 r198738 r198739 r198740 r198893 r198909
r198910 r199014 r199024 r199028 r199031 r199033 r199061 r199775 r199781
r199786 r199940 r199974 r199975 r199977 r200103 r200104 r200112 r200130
r200131 r200141 r200282 r200368 r200373 r200376 r200509 r200617 r200960
r200961 r200962 r200963 r200965

Submitted by:	rdivacky
2014-02-20 21:56:15 +00:00
peter
3dfc829bda Revert my commit in r261253; the real problem was tackled in r262209. 2014-02-20 20:53:29 +00:00
tuexen
a1eb8eb32c Remove redundant code and fix a style error.
MFC after: 3 days
2014-02-20 20:14:43 +00:00
peter
6c44c70624 Match our implementation of iconv's inbuf argument. 2014-02-20 20:09:28 +00:00
peter
5d993dc7e6 Import svn-1.8.8.
Highlights:
* Security fix for apache server plugin that we don't build or use
* sqlite performance improvements.
* bug fixes for edge cases and some other less common operations.
2014-02-20 19:48:47 +00:00
trasz
c7867dffff Make it clear that there are two ways to add a session using iscsictl(8),
and some options require configuration file.

Reviewed by:	emaste
Sponsored by:	The FreeBSD Foundation
2014-02-20 17:23:08 +00:00
brueffer
13f3fcac7a Spelling, grammar and mdoc cleanup. 2014-02-20 16:35:48 +00:00
skreuzer
90bde37d52 Document r261504 - FreeBSD/i386 guests can be run under bhyve.
Document r261498 - ping uses the Capsicum framework to drop privileges
Document r261344 - mdocml have been upgraded to version 1.12.3
Documetn r261991 - llvm/clang have been upgraded to version 3.4

Approved by:	hrs (mentor)
2014-02-20 14:39:12 +00:00
ian
7de199d4c4 Add early printf support, wrapped in #if 0 because it's only rarely needed. 2014-02-20 14:29:59 +00:00
brueffer
729a849847 Fix a cross-reference.
MFC after:	3 days
2014-02-20 13:33:18 +00:00
loos
5ffc863242 Fix the boot on FDT-enabled systems after r261819.
While here, don't overwrite the error message on interactive use and add
the missing '\n' at end of error message for the non interactive use.

Tested by:	ian, myself
Approved by:	adrian (mentor, implicit)
2014-02-20 13:09:08 +00:00
luigi
bc86850d45 compile with NOINET 2014-02-20 04:56:55 +00:00
neel
4626d164b8 Simplify APIC mode switching from MMIO to x2APIC. In part this is done to
simplify the implementation of the x2APIC virtualization assist in VT-x.

Prior to this change the vlapic allowed the guest to change its mode from
xAPIC to x2APIC. We don't allow that any more and the vlapic mode is locked
when the virtual machine is created. This is not very constraining because
operating systems already have to deal with BIOS setting up the APIC in
x2APIC mode at boot.

Fix a bug in the CPUID emulation where the x2APIC capability was leaking
from the host to the guest.

Ignore MMIO reads and writes to the vlapic in x2APIC mode. Similarly, ignore
MSR accesses to the vlapic when it is in xAPIC mode.

The default configuration of the vlapic is xAPIC. The "-x" option to bhyve(8)
can be used to change the mode to x2APIC instead.

Discussed with:	grehan@
2014-02-20 01:48:25 +00:00
rwatson
ef25a6c63e Temporarily unhook BERI boot loader from the build until 32-bit MIPS
properly excludes building our 64-bit only boot-loader adaptation.
2014-02-19 23:09:25 +00:00
brueffer
4f59b709c5 Spelling, grammar and mdoc cleanup.
MFC after:	1 week
2014-02-19 21:31:04 +00:00
rwatson
17c7f9bbd2 Do build boot-loader FDT code on MIPS.
MFC after:	3 weeks
Sponsored by:	DARPA, AFRL
2014-02-19 17:44:59 +00:00
mm
d2d19c03ef Revert r262196
I am going to split this into two individual patches and test it with
the projects/pf branch that may get merged later.
2014-02-19 17:06:04 +00:00
bdrewery
8efe90ab8e Add missing Save Cursor support for VT520
Submitted by:	IWAMOTO Kouichi <sue@iwmt.org>
PR:		conf/174937
Obtained from:	http://web.mit.edu/dosathena/doc/www/ek-vt520-rm.pdf
Approved by:	bapt (mentor)
MFC after:	2 weeks
2014-02-19 13:06:50 +00:00
rwatson
177e7097b2 Update MIPS bootinfo.h to reflect the actual MIPS boot2/loader boot-time
interface.

MFC after:	3 weeks
Sponsored by:	DARPA, AFRL
2014-02-19 09:19:09 +00:00
zec
e1e2a9a54e V_irtualize rtsock refcounting, which reduces the chances for panics
on teardown of vnets without active routing sockets while at least
one routing socket is active elsewhere.

Tested by:	Vijay Singh
MFC after:	3 days
2014-02-19 08:29:07 +00:00
peter
af89511727 Really (I think) fix the sporadic heimdal build failures with high -j
levels. The root of the problem was that make was attempting to run up
to three concurrent asn1_compile commands to produce the three outputs
that it was declared to produce.  The failure was caused when the
asn1_compiles were started out of sync and a later one was truncating
the files that another thread was trying to copy.  In reality it is
supposed to be run exactly once and all three outputs are produced in
one pass.

Use the same hack as for the parent's Makefile.inc for the compile_et
multi-output rule.
2014-02-19 07:09:14 +00:00
adrian
a4be223241 Extract out the port VLAN flags/setup code and throw it into two new
HAL methods.

This allows the AR8327 code to override it as appropriate.

Tested:

* DB120 - AR8327 and AR9340 on-board switch; only running 'etherswitchcfg'
  to check configs.  The actual VLAN programming wasn't tested.
2014-02-19 06:43:52 +00:00
adrian
d45e8830ab Add methods for the VLAN port set/get routines.
The registers (and perhaps the flags) are different for the AR8327, so
I'll stub those out until they're written.

Tested:

* DB120 - both on-chip AR9340 and AR8327 switches.
2014-02-19 06:35:17 +00:00
adrian
472a51527b Turn the port init function into a HAL method and initialise it to the
default port init code.

This needs to be overridden for the AR8327.
2014-02-19 06:03:58 +00:00
adrian
32733ba485 Teach the PHY register path about the different MDIO bus address
for the AR8327.

Tested:

* AR8327, DB120
2014-02-19 06:02:47 +00:00
adrian
135fe0a255 Add a new method to set up the individual port in question.
The AR8327 requires some different setup code.
2014-02-19 06:01:40 +00:00
adrian
af3c3253f5 Change arswitch_ports_init() to arswitch_port_init(), and teach it to take
a single port to setup.

This may end up later being used as part of some logic to program
the PHY for a single port, rather than having to reinitialise them
all at once.

Tested:

* DB120
2014-02-19 05:35:41 +00:00
adrian
f0624d1188 Add in the AR8327 probe/attach code and switch type.
It detects fine, but (as expected) it won't attach just yet, let alone
pass traffic.

Tested:

* DB120, AR8327 switch
2014-02-19 05:09:47 +00:00
adrian
4223f4f321 Store away the chip version and revision; some AR8327 code depends upon
the chip revision.
2014-02-19 04:30:53 +00:00
adrian
d6af13f80d Add in a flag to control whether the low or high data word of a register access
is latched in first.

The AR8327 apparently requires the low data word be latched in first.

Obtained from:	Linux OpenWRT
2014-02-19 04:23:01 +00:00
rwatson
a631141dcb Replace Apache-style license on two Makefiles with stock 2-clause BSD;
license, although the former is pretty safe, it wasn't intended to be
used in the version of MIPS boot2/loader upstreamed to FreeBSD.

MFC after:	3 weeks
Sponsored by:	DARPA, AFRL
2014-02-18 23:22:54 +00:00
rwatson
bd26e89073 Commit a first cut at ports of boot2 and loader to 64-bit MIPS, with a
particular interest in (and support for) SRI International and the
University of Cambridge's BERI FPGA soft-core processor.  This includes
micro device drivers for the Altera JTAG UART console, memory-mapped
flash, and the Altera SD Card IP core in both boot2 and loader.  boot2
can be written to the on-board Intel StrataFlash on the DE4 board, and
loader can be placed in StrataFlash or the SD Card.

Plenty of XXX comments, but works quite well locally in practice and I
am using it daily.  Although I had originally ported the ARM version
of boot2, the current version is x86-derived as that proved more
feature-complete.  As we don't currently use partitions on our flash
disks, support for that has been commented out relative to x86, but
would be easy to add back.  FDT support has not yet been hooked up,
although some skeleton parts have been put in place for that.

This may well be a useful starting point for ports to other 32-bit and
64-bit MIPS-ISA systems.

This merge is synchronised to CheriBSD github commit
e41d74fd719525d4dd7a7ee499114679165eeaf6, but with some additions of
$FreeBSD.

MFC after:	3 weeks
Sponsored by:	DARPA, AFRAL
2014-02-18 23:18:32 +00:00
mm
73f4b67f38 De-virtualize pf_mtag_z [1]
Process V_pf_overloadqueue in vnet context [2]

This fixes two VIMAGE kernel panics and allows to simultaneously run host-pf
and vnet jails. pf inside jails remains broken.

PR:		kern/182964
Submitted by:	glebius@FreeBSD.org [2], myself [1]
Tested by:	rodrigc@FreeBSD.org, myself
MFC after:	2 weeks
2014-02-18 22:17:12 +00:00
loos
4584fdf888 Remove an unnecessary header.
Reported by:	nwhitehorn
Approved by:	adrian (mentor, implicit)
2014-02-18 21:29:30 +00:00
emaste
f1336624c4 Fix mismerge in r262121
A break statement was lost in the merge.  The error had no functional
impact, but restore it to reduce the diff against upstream.
2014-02-18 19:46:45 +00:00
neel
dc56a06bc6 Add a check to validate that memory BARs of passthru devices are 4KB aligned.
Also, the MSI-x table offset is not required to be 4KB aligned so take this
into account when computing the pages occupied by the MSI-x tables.
2014-02-18 19:00:15 +00:00
jonathan
c8fef20aca Add more __BEGIN_DECLS / __END_DECLS to <sys/capability.h>.
capability.h currently only wraps some of its declarations in __BEGIN_DECLS/__END_DECLS, so cap_enter(), cap_sandboxed(), etc. are usable from C++ code but cap_rights_init(), cap_rights_is_valid() etc. are not. This commit fixes this distinction.

Approved by:	rwatson (mentor)
MFC after:	1 week
Sponsored by:	DARPA, AFRL
2014-02-18 14:54:56 +00:00
glebius
d61db4cf95 Fix incorrect assertions. 2014-02-18 14:21:26 +00:00
luigi
0e6492a43b enable rfc1323 and rfc1644 by default in picobsd images.
I disabled it some 15 years ago but it is useful to have them on
when doing tcp throughput tests.
2014-02-18 04:38:26 +00:00
luigi
c2bafade93 two small changes:
- intercept FIONBIO and FIOASYNC ioctls on netmap file descriptors.
  libpcap calls them to set non blocking I/O on the file descriptor,
  for netmap this is a no-op because there is no read/write,
  but not intercepting would cause fcntl() to return -1
- rate limit and put under netmap.verbose some messages that occur
  when threads use concurrently the same file descriptor.
2014-02-18 04:27:41 +00:00
jhb
521737384d A first pass at adding support for injecting hardware exceptions for
emulated instructions.
- Add helper routines to inject interrupt information for a hardware
  exception from the VM exit callback routines.
- Use the new routines to inject GP and UD exceptions for invalid
  operations when emulating the xsetbv instruction.
- Don't directly manipulate the entry interrupt info when a user event
  is injected.  Instead, store the event info in the vmx state and
  only apply it during a VM entry if a hardware exception or NMI is
  not already pending.
- While here, use HANDLED/UNHANDLED instead of 1/0 in a couple of
  routines.

Reviewed by:	neel
2014-02-18 03:07:36 +00:00
jhb
ea7ce4c7d3 Tweak the handling of PCI capabilities in emulated devices to remove
the non-standard zero capability list terminator.   Instead, track
the start and end of the most recently added capability and use that
to adjust the previous capability's next pointer when a capability is
added and to determine the range of config registers belonging to
PCI capability registers.

Reviewed by:	neel
2014-02-18 03:00:20 +00:00
rodrigc
3e3bcb4236 In ue_attach_post_task(), initialize curvnet to vnet0 before calling if_attach().
Before this patch, curvnet was NULL.
When the VIMAGE kernel option is enabled, this eliminates
kernel panics when USB ethernet devices are plugged in.

PR: 183835
Submitted by: Hiroo Oono <hiroo.ono at gmail dot com>
2014-02-18 01:20:26 +00:00
neel
f9781635be Handle writes to the SELF_IPI MSR by the guest when the vlapic is configured
in x2apic mode. Reads to this MSR are currently ignored but should cause a
general proctection exception to be injected into the vcpu.

All accesses to the corresponding offset in xAPIC mode are ignored.

Also, do not panic the host if there is mismatch between the trigger mode
programmed in the TMR and the actual interrupt being delivered. Instead the
anomaly is logged to aid debugging and to prevent a misbehaving guest from
panicking the host.
2014-02-17 23:07:16 +00:00
neel
19c649a6fb Use spinlocks to lock accesses to the vioapic.
This is necessary because if the vlapic is configured in x2apic mode the
vioapic_process_eoi() function is called inside the critical section
established by vm_run().
2014-02-17 22:57:51 +00:00
brueffer
73e4798829 Remove the 3rd clause ("advertising clause") of the BSD license as
permitted by the University of Berkeley on July 22, 1999.

Reviewed by:	imp
MFC after:	1 week
2014-02-17 22:27:32 +00:00
brueffer
932796ca36 Add $FreeBSD$.
MFC after:	1 week
2014-02-17 22:26:21 +00:00
asomers
dea7bea336 test_eagain_*_* should've been using nonblocking sockets instead of
blocking sockets.  The error was not exposed as long as the kernel
suffered from PR kern/185812.  Now corrected, these tests pass on
DragonFlyBSD 3.6.0.

PR:		kern/185812
Sponsored by:	Spectra Logic Corporation
MFC after:	2 weeks
2014-02-17 22:06:52 +00:00