da4dad492d
- XLS B0 and later revision chips have PCIe link 2 & 3 mapped to different PIC interrupts. Update pic.h, board.h and xlr_pci.c to reflect this. - remove debug prints in xlr_pci.c - add more processor IDs to board.h, add function xlr_is_xls_b0() - some style(9) and whitespace fixes