freebsd-skq/sys/dev/usb/controller
Hans Petter Selasky 08aa4c94b8 Try to fix DWC OTG regression issues with full and low speed devices:
- Remove double buffering interrupt and isochronous traffic via the
transaction translator. It can be avoided because the DWC OTG will
always delay the start split transactions for interrupt and
isochronous traffic, but will not delay the complete split
transactions, if we set the odd frame bit correctly.
- Need to check the transfer cache field in the device done function
to be sure all allocated channels are freed and not the transfer first
one. This seems to resolve the control endpoint transfer type quirk
which is now removed.
- Make sure any received data upon TX is dumped else RX path will
stop.
- Transmit isochronous data before receiving isochronous data as a
means to optimise the TT schedule.
- Implement a simple TT bandwidth scheduler.
- Cleanup use of old "td->error" variable.
- On interrupt IN traffic via the transaction translator we simply
ignore missed transfer opportunities and silently retry the
transaction upon next available time slot.

MFC after:	3 days
2014-06-05 18:17:40 +00:00
..
at91dci_atmelarm.c Remove FreeBSD 6 support 2014-02-08 04:29:36 +00:00
at91dci_fdt.c Add device and gadget bindings for fdt. These are preliminary and will 2014-02-28 03:00:31 +00:00
at91dci.c - Isochronous transfers should use the alternate next transfer 2014-05-13 13:46:38 +00:00
at91dci.h
atmegadci_atmelarm.c
atmegadci.c - Isochronous transfers should use the alternate next transfer 2014-05-13 13:46:38 +00:00
atmegadci.h
avr32dci.c - Isochronous transfers should use the alternate next transfer 2014-05-13 13:46:38 +00:00
avr32dci.h
dwc_otg_fdt.c - Add softc pointer argument to FIFO functions as an optimisation. 2014-05-18 09:13:29 +00:00
dwc_otg.c Try to fix DWC OTG regression issues with full and low speed devices: 2014-06-05 18:17:40 +00:00
dwc_otg.h Try to fix DWC OTG regression issues with full and low speed devices: 2014-06-05 18:17:40 +00:00
dwc_otgreg.h Multiple DWC OTG host mode related fixes and improvements: 2014-05-09 14:23:06 +00:00
ehci_fsl.c Follow r261352 by updating all drivers which are children of simplebus 2014-02-02 19:17:28 +00:00
ehci_imx.c Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead 2014-04-26 16:48:09 +00:00
ehci_ixp4xx.c
ehci_mv.c Follow r261352 by updating all drivers which are children of simplebus 2014-02-02 19:17:28 +00:00
ehci_pci.c
ehci.c Issue doorbell twice before finally freeing the DMA descriptors. This 2014-02-12 08:04:38 +00:00
ehci.h
ehcireg.h
musb_otg_atmelarm.c
musb_otg.c - Isochronous transfers should use the alternate next transfer 2014-05-13 13:46:38 +00:00
musb_otg.h
ohci_atmelarm.c Remove FreeBSD 6 support 2014-02-08 04:29:36 +00:00
ohci_fdt.c Add device and gadget bindings for fdt. These are preliminary and will 2014-02-28 03:00:31 +00:00
ohci_pci.c
ohci_s3c24x0.c
ohci.c
ohci.h
ohcireg.h
saf1761_otg_boot.c Add ISP/SAF1761 bootloader bus interface file. 2014-05-30 13:42:11 +00:00
saf1761_otg_fdt.c Hook the ISP/SAF1761 driver into MIPS kernel builds. 2014-05-29 10:46:09 +00:00
saf1761_otg_reg.h Add basic support for isochronous transfers in host mode to the 2014-06-01 10:22:18 +00:00
saf1761_otg.c Add basic support for isochronous transfers in host mode to the 2014-06-01 10:22:18 +00:00
saf1761_otg.h Optimise the ISP/SAF1761 driver: 2014-05-29 10:06:18 +00:00
uhci_pci.c
uhci.c Separate I/O errors from reception of STALL PID. 2014-01-13 15:06:03 +00:00
uhci.h
uhcireg.h
usb_controller.c Hook the ISP/SAF1761 driver into MIPS kernel builds. 2014-05-29 10:46:09 +00:00
uss820dci_atmelarm.c
uss820dci.c - Isochronous transfers should use the alternate next transfer 2014-05-13 13:46:38 +00:00
uss820dci.h
xhci_pci.c Setting the IMOD value below 0x3F8 can cause IRQ lockups in the Intel 2014-04-27 15:41:44 +00:00
xhci.c - Fix a bug where the TLBPC value was forced to being odd for IN 2014-05-22 11:58:15 +00:00
xhci.h Setting the IMOD value below 0x3F8 can cause IRQ lockups in the Intel 2014-04-27 15:41:44 +00:00
xhcireg.h Setting the IMOD value below 0x3F8 can cause IRQ lockups in the Intel 2014-04-27 15:41:44 +00:00