Adrian Chadd
4aa8818b55
Flesh out some initial EDMA TX FIFO fill, complete and refill routines.
Note: This is totally sub-optimal and a work in progress. * Support filling an empty FIFO TXQ with frames from the ath_buf queue in the ath_txq list. However, since there's (currently) no clean, easy way to separate the frames that are in the FIFO versus just waiting, the code waits for the FIFO to be totally empty before it attempts to queue more. This is highly sub-optimal but is enough to get the ball rolling. * A _lot_ of the code assumes that the TX status is filled out in the struct ath_buf bf_status field. So for now, memcpy() the completion over. * None of the TX drain / reset routines will attempt to complete completed frames before draining, so it can't be used for 802.11n TX aggregation. (This won't work anyway, as the aggregation TX descriptor API hasn't yet been converted; and that'll happen in some future commits.) * Fix an issue where the FIFO counter wasn't being incremented, leading to the queue logic just plain not working. * HAL_EIO means "descriptor wasn't valid", versus "not finished, don't continue." So don't stop processing descriptors when HAL_EIO is hit. * Don't service frame completion from the beacon queue. It isn't currently fully setup like a real queue and the first attempt at accessing the queue lock will panic the kernel. Tested: * AR9380, STA mode This commit is brought to you by said AR9380 in STA mode.
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