adrian 65b6a8c53f Add bus space barriers to the AR71xx SPI code.
This is required for correct, stable operation on the MIPS74k SoCs
that are dual-issue, superscalar pipelines.

Tested:

* AR9344 SoC (MIPS74k)
* AR9331 SoC (MIPS24k)
2013-10-16 02:10:35 +00:00
..
2013-02-26 01:00:11 +00:00
2013-02-26 01:00:11 +00:00
2013-10-09 07:55:21 +00:00
2013-02-26 01:00:11 +00:00
2013-02-28 13:46:03 +00:00
2013-02-26 01:00:11 +00:00