freebsd-skq/share/man/man4/iicbus.4
2000-12-29 09:18:45 +00:00

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.Dd August 6, 1998
.Dt IICBUS 4
.Os FreeBSD
.Sh NAME
.Nm iicbus
.Nd
I2C bus system
.Sh SYNOPSIS
.Cd "device iicbus"
.Cd "device iicbb"
.Pp
.Cd "device iic"
.Cd "device ic"
.Cd "device iicsmb"
.Sh DESCRIPTION
The
.Em iicbus
system provides a uniform, modular and architecture-independent
system for the implementation of drivers to control various I2C devices
and to utilize different I2C controllers.
.Sh I2C
I2C is an acronym for Inter Integrated Circuit bus.
The I2C bus was developed
in the early 1980's by Philips semiconductors.
It's purpose was to provide an
easy way to connect a CPU to peripheral chips in a TV-set.
.Pp
The BUS physically consists of 2 active wires and a ground connection.
The active wires, SDA and SCL, are both bidirectional.
Where SDA is the
Serial DAta line and SCL is the Serial CLock line.
.Pp
Every component hooked up to the bus has its own unique address whether it
is a CPU, LCD driver, memory, or complex function chip.
Each of these chips
can act as a receiver and/or transmitter depending on its functionality.
Obviously an LCD driver is only a receiver, while a memory or I/O chip can
both be transmitter and receiver.
Furthermore there may be one or
more BUS MASTERs.
.Pp
The BUS MASTER is the chip issuing the commands on the BUS.
In the I2C protocol
specification it is stated that the IC that initiates a data transfer on the
bus is considered the BUS MASTER.
At that time all the others are regarded to
as the BUS SLAVEs.
As mentioned before, the IC bus is a Multi-MASTER BUS.
This means that more than one IC capable of initiating data transfer can be
connected to it.
.Sh DEVICES
Some I2C device drivers are available:
.Pp
.Bl -column "Device drivers" -compact
.It Em Devices Ta Em Description
.It Sy iic Ta "general i/o operation"
.It Sy ic Ta "network IP interface"
.It Sy iicsmb Ta "I2C to SMB software bridge"
.El
.Sh INTERFACES
The I2C protocol may be implemented by hardware or software.
Software
interfaces rely on very simple hardware, usually two lines
twiddled by 2 registers.
Hardware interfaces are more intelligent and receive
8-bit characters they write to the bus according to the I2C protocol.
.Pp
I2C interfaces may act on the bus as slave devices, allowing spontaneous
bidirectional communications, thanks to the multi-master capabilities of the
I2C protocol.
.Pp
Some I2C interfaces are available:
.Pp
.Bl -column "Interface drivers" -compact
.It Em Interface Ta Em Description
.It Sy pcf Ta "Philips PCF8584 master/slave interface"
.It Sy iicbb Ta "generic bit-banging master-only driver"
.It Sy lpbb Ta "parallel port specific bit-banging interface"
.It Sy bktr Ta "Brooktree848 video chipset, hardware and software master-only interface"
.El
.Sh SEE ALSO
.Xr iicbb 4 ,
.Xr lpbb 4 ,
.Xr pcf 4
.Sh HISTORY
The
.Nm
manual page first appeared in
.Fx 3.0 .
.Sh AUTHORS
This
manual page was written by
.An Nicolas Souchu .