jkoshy 43d0bd9696 MFC r1.6: ... "Revert revision 1.4. Intel CPUs with family 0x6, model 0xE and later (i.e., Intel Core(TM)) have a PMC architecture that differs somewhat from previous CPUs in family 0x6. Even though the basic programming model is similar, the documented set of legal values that may be loaded into their PMC MSRs differs from that of the previous PMCs in family 0x6 and reusing bit values legal for the older PMCs could result in undefined behaviour in the general case."		2007-12-03 11:00:39 +00:00
..
hwpmc_alpha.c	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_amd.c	MFC r1.12:	2005-09-15 15:48:16 +00:00
hwpmc_amd.h	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_arm.c	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_ia64.c	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_logging.c	MFC {r1.19,r1.21 sys/dev/hwpmc/hwpmc_mod.c; r1.5 hwpmc_logging.c}:	2006-03-22 10:25:37 +00:00
hwpmc_mod.c	MFC: Change msleep() and tsleep() to not alter the calling thread's	2006-06-16 22:11:55 +00:00
hwpmc_pentium.c	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_pentium.h	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_piv.c	sys/dev/hwpmc/hwpmc_{amd,piv,ppro}.c:	2005-07-09 17:29:36 +00:00
hwpmc_piv.h	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_powerpc.c	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_ppro.c	MFC r1.9:	2005-07-29 03:01:40 +00:00
hwpmc_ppro.h	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_sparc64.c	MFP4:	2005-06-09 19:45:09 +00:00
hwpmc_x86.c	MFC r1.6:	2007-12-03 11:00:39 +00:00
pmc_events.h	MFP4:	2005-06-09 19:45:09 +00:00