235ad806ee
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git @afaecb70e7ebb983c86d5eb45ff952e9af79c462
25 lines
649 B
Plaintext
25 lines
649 B
Plaintext
Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
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Required properties:
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- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
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- reg: Base address and size of the controllers memory area
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- clocks: phandle of the AHB clock.
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- clock-names: has to be "ahb".
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- #address-cells: <1>, as required by generic SPI binding.
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- #size-cells: <0>, also as required by generic SPI binding.
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Child nodes as per the generic SPI binding.
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Example:
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spi@1f000000 {
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compatible = "qca,ar9132-spi", "qca,ar7100-spi";
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reg = <0x1f000000 0x10>;
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clocks = <&pll 2>;
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clock-names = "ahb";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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