adrian 48f29e1c7d AR933x CPU device improvements: ... * Add baud rate and divisor programming code. See below for more information. * Flesh out ar933x_init() to disable interrupts and program the initial console setup. * Remove #if 0'ed code from ar933x_term(). * Explain what these functions do. Now, the baud rate and divisor code comes from Linux, as a submission to the OpenWRT project and Linux kernel from Gabor Juhos <juhosg@openwrt.org>. The original ticket for this code is https://dev.openwrt.org/ticket/12031 . I've contacted Gabor and asked for his permission to also licence the patch in question (which covers this code) to BSD lience and he's agreed. Hence why I'm including it here in FreeBSD. Tested: * AP121 (AR9330)		2013-03-30 04:31:29 +00:00
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apb.c	Move PMC hook invocation to cpu_intr. The idea is the same as with ast()	2012-03-22 17:47:52 +00:00
apbvar.h
ar71xx_bus_space_reversed.c
ar71xx_bus_space_reversed.h
ar71xx_chip.c	Add the reference clock for each supported chip.	2013-03-27 03:33:19 +00:00
ar71xx_chip.h	MII related infrastructure changes.	2012-05-02 01:21:57 +00:00
ar71xx_cpudef.h	Add the reference clock for each supported chip.	2013-03-27 03:33:19 +00:00
ar71xx_ehci.c	Implement better support for USB controller suspend and resume.	2011-12-14 00:28:54 +00:00
ar71xx_fixup.c	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
ar71xx_fixup.h	Introduce the matching PCI ath(4) fixup code from ar71xx_pci into	2012-04-20 08:26:05 +00:00
ar71xx_gpio.c	The GPIO drivers were initialising their mutexes with type of	2012-08-17 04:44:57 +00:00
ar71xx_gpiovar.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar71xx_machdep.c	Print out the platform reference frequency.	2013-03-29 06:31:31 +00:00
ar71xx_ohci.c	Implement better support for USB controller suspend and resume.	2011-12-14 00:28:54 +00:00
ar71xx_pci_bus_space.c
ar71xx_pci_bus_space.h
ar71xx_pci.c	Mips Atheros AR71XX: make PCI base slot configurable through hints.	2013-01-06 20:50:31 +00:00
ar71xx_setup.c	Tie in the AR933x support into -HEAD.	2013-03-28 19:30:56 +00:00
ar71xx_setup.h
ar71xx_spi.c
ar71xx_wdog.c
ar71xxreg.h	Add a missing newline.	2012-05-02 06:17:16 +00:00
ar91xx_chip.c	Add the reference clock for each supported chip.	2013-03-27 03:33:19 +00:00
ar91xx_chip.h
ar91xxreg.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar724x_chip.c	Add the reference clock for each supported chip.	2013-03-27 03:33:19 +00:00
ar724x_chip.h
ar724x_pci.c	Ensure that BAR(0) is set for the PCI slot before the ath(4) PCI registers	2012-08-26 04:39:20 +00:00
ar724xreg.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar933x_chip.c	Fix the AR933x platform device start/stop code.	2013-03-28 05:43:03 +00:00
ar933x_chip.h	Commit initial (unfinished!) support for the AR933x series of embedded	2013-03-27 03:38:58 +00:00
ar933x_uart.h	* Fix clock register definitions	2013-03-29 06:32:02 +00:00
ar933xreg.h	Commit initial (unfinished!) support for the AR933x series of embedded	2013-03-27 03:38:58 +00:00
files.ar71xx	Tie in the AR933x support into -HEAD.	2013-03-28 19:30:56 +00:00
if_arge.c	Mechanically substitute flags from historic mbuf allocator with	2012-12-05 08:04:20 +00:00
if_argevar.h	Implement PLL configuration override support, similar to what openwrt	2012-05-02 07:43:11 +00:00
pcf2123_rtc.c
pcf2123reg.h
std.ar71xx	Assume a big-endian default on MIPS and drop the "eb" suffix from MACHINE_ARCH.	2012-03-29 02:54:35 +00:00
uart_bus_ar71xx.c
uart_bus_ar933x.c	For the AR933x UART, the serial clock is not the AHB clock, it's the	2013-03-29 06:32:39 +00:00
uart_cpu_ar71xx.c
uart_cpu_ar933x.c	For the AR933x UART, the serial clock is not the AHB clock, it's the	2013-03-29 06:32:39 +00:00
uart_dev_ar933x.c	AR933x CPU device improvements:	2013-03-30 04:31:29 +00:00
uart_dev_ar933x.h	Bring over the initial, CPU-only UART support for the AR933x SoC.	2013-03-28 19:27:06 +00:00