fad63e2d45
Update the device tree source files to a Linux 4.7-RC. The dts tree currently can't be merged w/o specific revisions. Note: due to a stupid bug in the commit checking script, I couldn't just remove the svn:keyword tag from the new files, I had to add fbsd:nokeywords to all the files (including ones that didn't need it)
365 lines
9.6 KiB
Plaintext
365 lines
9.6 KiB
Plaintext
/*
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* Device Tree file for Synology DS414
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*
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* Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Note: this Device Tree assumes that the bootloader has remapped the
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* internal registers to 0xf1000000 (instead of the old 0xd0000000).
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* The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
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* bootloaders provided by Marvell. It is used in recent versions of
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* DSM software provided by Synology. Nonetheless, some earlier boards
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* were delivered with an older version of u-boot that left internal
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* registers mapped at 0xd0000000. If you have such a device you will
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* not be able to directly boot a kernel based on this Device Tree. In
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* that case, the preferred solution is to update your bootloader (e.g.
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* by upgrading to latest version of DSM, or building a new one and
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* installing it from u-boot prompt) or adjust the Devive Tree
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* (s/0xf1000000/0xd0000000/ in 'ranges' below).
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-xp-mv78230.dtsi"
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/ {
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model = "Synology DS414";
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compatible = "synology,ds414", "marvell,armadaxp-mv78230",
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"marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0 0x00000000 0 0x40000000>; /* 1GB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
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pcie-controller {
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status = "okay";
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/*
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* Connected to Marvell 88SX7042 SATA-II controller
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* handling the four disks.
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*/
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/*
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* Connected to EtronTech EJ168A XHCI controller
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* providing the two rear USB 3.0 ports.
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*/
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pcie@5,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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internal-regs {
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/* RTC is provided by Seiko S-35390A below */
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rtc@10300 {
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status = "disabled";
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};
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spi0: spi@10600 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "micron,n25q064", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <20000000>;
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/*
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* Warning!
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*
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* Synology u-boot uses its compiled-in environment
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* and it seems Synology did not care to change u-boot
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* default configuration in order to allow saving a
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* modified environment at a sensible location. So,
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* if you do a 'saveenv' under u-boot, your modified
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* environment will be saved at 1MB after the start
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* of the flash, i.e. in the middle of the uImage.
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* For that reason, it is strongly advised not to
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* change the default environment, unless you know
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* what you are doing.
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*/
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partition@00000000 { /* u-boot */
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label = "RedBoot";
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reg = <0x00000000 0x000d0000>; /* 832KB */
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};
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partition@000c0000 { /* uImage */
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label = "zImage";
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reg = <0x000d0000 0x002d0000>; /* 2880KB */
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};
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partition@003a0000 { /* uInitramfs */
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label = "rd.gz";
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reg = <0x003a0000 0x00430000>; /* 4250KB */
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};
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partition@007d0000 { /* MAC address and serial number */
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label = "vendor";
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reg = <0x007d0000 0x00010000>; /* 64KB */
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};
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partition@007e0000 {
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label = "RedBoot config";
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reg = <0x007e0000 0x00010000>; /* 64KB */
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};
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partition@007f0000 {
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label = "FIS directory";
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reg = <0x007f0000 0x00010000>; /* 64KB */
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};
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};
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};
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i2c@11000 {
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clock-frequency = <400000>;
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status = "okay";
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s35390a: s35390a@30 {
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compatible = "sii,s35390a";
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reg = <0x30>;
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};
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};
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/* Connected to a header on device's PCB. This
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* provides the main console for the device.
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*
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* Warning: the device may not boot with a 3.3V
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* USB-serial converter connected when the power
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* button is pressed. The converter needs to be
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* connected a few seconds after pressing the
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* power button. This is possibly due to UART0_TXD
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* pin being sampled at reset (bit 0 of SAR).
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*/
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serial@12000 {
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status = "okay";
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};
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/* Connected to a Microchip PIC16F883 for power control */
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serial@12100 {
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status = "okay";
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};
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poweroff@12100 {
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compatible = "synology,power-off";
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reg = <0x12100 0x100>;
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clocks = <&coreclk 0>;
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};
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/* Front USB 2.0 port */
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usb@50000 {
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status = "okay";
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};
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mdio {
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phy0: ethernet-phy@0 { /* Marvell 88E1512 */
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reg = <0>;
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};
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phy1: ethernet-phy@1 { /* Marvell 88E1512 */
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reg = <1>;
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};
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};
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ethernet@70000 {
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status = "okay";
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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ethernet@74000 {
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pinctrl-0 = <&ge1_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
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&sata3_pwr_pin &sata4_pwr_pin>;
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pinctrl-names = "default";
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sata1_regulator: sata1-regulator {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "SATA1 Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <2000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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};
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sata2_regulator: sata2-regulator {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "SATA2 Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <4000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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sata3_regulator: sata3-regulator {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "SATA3 Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <6000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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};
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sata4_regulator: sata4-regulator {
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compatible = "regulator-fixed";
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reg = <4>;
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regulator-name = "SATA4 Power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <8000000>;
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&pinctrl {
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sata1_pwr_pin: sata1-pwr-pin {
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marvell,pins = "mpp42";
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marvell,function = "gpio";
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};
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sata2_pwr_pin: sata2-pwr-pin {
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marvell,pins = "mpp44";
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marvell,function = "gpio";
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};
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sata3_pwr_pin: sata3-pwr-pin {
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marvell,pins = "mpp45";
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marvell,function = "gpio";
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};
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sata4_pwr_pin: sata4-pwr-pin {
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marvell,pins = "mpp46";
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marvell,function = "gpio";
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};
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sata1_pres_pin: sata1-pres-pin {
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marvell,pins = "mpp34";
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marvell,function = "gpio";
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};
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sata2_pres_pin: sata2-pres-pin {
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marvell,pins = "mpp35";
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marvell,function = "gpio";
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};
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sata3_pres_pin: sata3-pres-pin {
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marvell,pins = "mpp40";
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marvell,function = "gpio";
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};
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sata4_pres_pin: sata4-pres-pin {
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marvell,pins = "mpp41";
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marvell,function = "gpio";
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};
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syno_id_bit0_pin: syno-id-bit0-pin {
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marvell,pins = "mpp26";
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marvell,function = "gpio";
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};
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syno_id_bit1_pin: syno-id-bit1-pin {
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marvell,pins = "mpp28";
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marvell,function = "gpio";
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};
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syno_id_bit2_pin: syno-id-bit2-pin {
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marvell,pins = "mpp29";
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marvell,function = "gpio";
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};
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fan1_alarm_pin: fan1-alarm-pin {
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marvell,pins = "mpp33";
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marvell,function = "gpio";
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};
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fan2_alarm_pin: fan2-alarm-pin {
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marvell,pins = "mpp32";
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marvell,function = "gpio";
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};
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};
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