fad63e2d45
Update the device tree source files to a Linux 4.7-RC. The dts tree currently can't be merged w/o specific revisions. Note: due to a stupid bug in the commit checking script, I couldn't just remove the svn:keyword tag from the new files, I had to add fbsd:nokeywords to all the files (including ones that didn't need it)
438 lines
10 KiB
Plaintext
438 lines
10 KiB
Plaintext
/*
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* omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
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*
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* Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "omap36xx.dtsi"
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vcc>;
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operating-points = <
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/* kHz uV */
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300000 1012500
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600000 1200000
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800000 1325000
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1000000 1375000
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>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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vemmc: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "VEMMC";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
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startup-delay-us = <150>;
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enable-active-high;
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};
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vwlan_fixed: fixedregulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "VWLAN";
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gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
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enable-active-high;
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regulator-boot-off;
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};
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leds {
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compatible = "gpio-leds";
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heartbeat {
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label = "debug::sleep";
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gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; /* gpio92 */
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linux,default-trigger = "default-on";
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pinctrl-names = "default";
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pinctrl-0 = <&debug_leds>;
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};
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};
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};
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&omap3_pmx_core {
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accelerator_pins: pinmux_accelerator_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4) /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
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OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4) /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
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>;
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};
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debug_leds: pinmux_debug_led_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4) /* dss_data22.gpio_92 */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
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OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
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OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
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OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
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OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
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OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
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>;
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};
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wlan_pins: pinmux_wlan_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */
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OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */
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>;
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};
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ssi_pins: pinmux_ssi_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
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OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
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OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
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OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
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OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
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OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
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OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
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OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
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>;
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};
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ssi_pins_idle: pinmux_ssi_pins_idle {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7) /* ssi1_dat_tx */
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OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7) /* ssi1_flag_tx */
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OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7) /* ssi1_rdy_tx */
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OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
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OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7) /* ssi1_dat_rx */
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OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7) /* ssi1_flag_rx */
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OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* ssi1_rdy_rx */
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OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7) /* ssi1_wake */
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>;
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};
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modem_pins1: pinmux_modem_core1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4) /* gpio_34 (ape_rst_rq) */
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OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst_rq) */
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OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
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>;
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};
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};
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&omap3_pmx_core2 {
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modem_pins2: pinmux_modem_core2_pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* gpio_23 (cmt_en) */
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>;
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};
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};
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&i2c1 {
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clock-frequency = <2900000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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};
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};
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/include/ "twl4030.dtsi"
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&twl {
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compatible = "ti,twl5031";
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twl_power: power {
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compatible = "ti,twl4030-power";
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ti,use_poweroff;
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};
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};
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&twl_gpio {
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ti,pullups = <0x000001>; /* BIT(0) */
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ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
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};
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&vdac {
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regulator-name = "vdac";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&vpll1 {
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regulator-name = "vpll1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&vpll2 {
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regulator-name = "vpll2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&vaux1 {
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regulator-name = "vaux1";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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/* CSI-2 receiver */
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&vaux2 {
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regulator-name = "vaux2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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/* Cameras */
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&vaux3 {
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regulator-name = "vaux3";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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&vaux4 {
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regulator-name = "vaux4";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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&vmmc1 {
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regulator-name = "vmmc1";
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regulator-min-microvolt = <1850000>;
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regulator-max-microvolt = <3150000>;
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};
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&vmmc2 {
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regulator-name = "vmmc2";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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&vintana1 {
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regulator-name = "vintana1";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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};
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&vintana2 {
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regulator-name = "vintana2";
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regulator-min-microvolt = <2750000>;
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regulator-max-microvolt = <2750000>;
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};
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&vintdig {
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regulator-name = "vintdig";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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};
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&vsim {
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regulator-name = "vsim";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&vio {
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regulator-name = "vio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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clock-frequency = <400000>;
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lis302: lis302@1d {
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compatible = "st,lis3lv02d";
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reg = <0x1d>;
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Vdd-supply = <&vaux1>;
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Vdd_IO-supply = <&vio>;
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pinctrl-names = "default";
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pinctrl-0 = <&accelerator_pins>;
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interrupts-extended = <&gpio6 20 IRQ_TYPE_EDGE_FALLING>, <&gpio6 21 IRQ_TYPE_EDGE_FALLING>; /* 180, 181 */
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/* click flags */
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st,click-single-x;
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st,click-single-y;
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st,click-single-z;
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/* Limits are 0.5g * value */
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st,click-threshold-x = <8>;
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st,click-threshold-y = <8>;
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st,click-threshold-z = <10>;
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/* Click must be longer than time limit */
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st,click-time-limit = <9>;
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/* Kind of debounce filter */
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st,click-latency = <50>;
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st,wakeup-x-hi;
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st,wakeup-y-hi;
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st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
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st,wakeup2-z-hi;
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st,wakeup2-threshold = <(1000/18)>; /* millig-value / 18 to get HW values */
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st,highpass-cutoff-hz = <2>;
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/* Interrupt line 1 for thresholds */
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st,irq1-ff-wu-1;
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st,irq1-ff-wu-2;
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/* Interrupt line 2 for click detection */
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st,irq2-click;
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st,wu-duration-1 = <8>;
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st,wu-duration-2 = <8>;
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};
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};
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&mmc1 {
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status = "disabled";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <&vemmc>;
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bus-width = <4>;
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ti,non-removable;
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};
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&mmc3 {
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status = "disabled";
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};
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&usb_otg_hs {
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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phys = <&usb2_phy>;
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phy-names = "usb2-phy";
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mode = <3>;
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power = <50>;
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};
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&gpmc {
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ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
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onenand@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
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gpmc,sync-read;
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gpmc,sync-write;
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gpmc,burst-length = <16>;
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gpmc,burst-read;
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gpmc,burst-wrap;
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gpmc,burst-write;
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gpmc,device-width = <2>;
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gpmc,mux-add-data = <2>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <87>;
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gpmc,cs-wr-off-ns = <87>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <10>;
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gpmc,adv-wr-off-ns = <10>;
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gpmc,oe-on-ns = <15>;
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gpmc,oe-off-ns = <87>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <87>;
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gpmc,rd-cycle-ns = <112>;
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gpmc,wr-cycle-ns = <112>;
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gpmc,access-ns = <81>;
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gpmc,page-burst-access-ns = <15>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,clk-activation-ns = <5>;
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gpmc,wr-data-mux-bus-ns = <30>;
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gpmc,wr-access-ns = <81>;
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gpmc,sync-clk-ps = <15000>;
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/*
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* MTD partition table corresponding to Nokia's MeeGo 1.2
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* Harmattan release.
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*/
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partition@0 {
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label = "bootloader";
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reg = <0x00000000 0x00100000>;
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};
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partition@1 {
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label = "config";
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reg = <0x00100000 0x002c0000>;
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};
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partition@2 {
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label = "kernel";
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reg = <0x003c0000 0x01000000>;
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};
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partition@3 {
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label = "log";
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reg = <0x013c0000 0x00200000>;
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};
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partition@4 {
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label = "var";
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reg = <0x015c0000 0x1ca40000>;
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};
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partition@5 {
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label = "moslo";
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reg = <0x1e000000 0x02000000>;
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};
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partition@6 {
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label = "omap2-onenand";
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reg = <0x00000000 0x20000000>;
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};
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};
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};
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&ssi_port1 {
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pinctrl-names = "default", "idle";
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pinctrl-0 = <&ssi_pins>;
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pinctrl-1 = <&ssi_pins_idle>;
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ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
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modem: hsi-client {
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pinctrl-names = "default";
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pinctrl-0 = <&modem_pins1 &modem_pins2>;
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hsi-channel-ids = <0>, <1>, <2>, <3>;
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hsi-channel-names = "mcsaab-control",
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"speech-control",
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"speech-data",
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"mcsaab-data";
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hsi-speed-kbps = <96000>;
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hsi-mode = "frame";
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hsi-flow = "synchronized";
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hsi-arb-mode = "round-robin";
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interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */
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gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */
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<&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */
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<&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */
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gpio-names = "cmt_apeslpx",
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"cmt_rst_rq",
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"cmt_en";
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};
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};
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&ssi_port2 {
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status = "disabled";
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};
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