a37c9e06da
The existing ti_pruss driver for the PRUSS Hardware provided by the AM335x ARM CPU has basic interrupt capabilities. This updated driver provides some more options: - Sysctl based configuration for the interrupts (for some examples, see the test plan in the phabricator review cited below). - A device file (/dev/pruss0.irqN) for each enabled interrupt. This file can be read and the device blocks if no irq has happened or returns an uint64_t timestamp based on nanouptime(). - Each interrupt device file provides kqueue-based event notification, blocking read(), or select(). Submitted by: Manuel Stuhn <freebsdnewbie@freenet.de> Differential Revision: https://reviews.freebsd.org/D11959
56 lines
2.5 KiB
C
56 lines
2.5 KiB
C
/*-
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* Copyright (c) 2013 Rui Paulo <rpaulo@FreeBSD.org>
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* Copyright (c) 2017 Manuel Stuehn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _TI_PRUSS_H_
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#define _TI_PRUSS_H_
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#define PRUSS_AM18XX_INTC 0x04000
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#define PRUSS_AM18XX_REV 0x4e825900
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#define PRUSS_AM33XX_REV 0x4e82A900
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#define PRUSS_AM33XX_INTC 0x20000
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#define PRUSS_INTC_GER (PRUSS_AM33XX_INTC + 0x0010)
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#define PRUSS_INTC_SISR (PRUSS_AM33XX_INTC + 0x0020)
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#define PRUSS_INTC_SICR (PRUSS_AM33XX_INTC + 0x0024)
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#define PRUSS_INTC_EISR (PRUSS_AM33XX_INTC + 0x0028)
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#define PRUSS_INTC_EICR (PRUSS_AM33XX_INTC + 0x002C)
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#define PRUSS_INTC_HIEISR (PRUSS_AM33XX_INTC + 0x0034)
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#define PRUSS_INTC_HIDISR (PRUSS_AM33XX_INTC + 0x0038)
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#define PRUSS_INTC_SECR0 (PRUSS_AM33XX_INTC + 0x0280)
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#define PRUSS_INTC_SECR1 (PRUSS_AM33XX_INTC + 0x0284)
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#define PRUSS_INTC_CMR_BASE (PRUSS_AM33XX_INTC + 0x0400)
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#define PRUSS_INTC_HMR_BASE (PRUSS_AM33XX_INTC + 0x0800)
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#define PRUSS_INTC_HIPIR_BASE (PRUSS_AM33XX_INTC + 0x0900)
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#define PRUSS_INTC_SIPR0 (PRUSS_AM33XX_INTC + 0x0D00)
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#define PRUSS_INTC_SIPR1 (PRUSS_AM33XX_INTC + 0x0D04)
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#define PRUSS_INTC_SITR0 (PRUSS_AM33XX_INTC + 0x0D80)
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#define PRUSS_INTC_SITR1 (PRUSS_AM33XX_INTC + 0x0D84)
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#define PRUSS_INTC_HIER (PRUSS_AM33XX_INTC + 0x1500)
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#endif /* _TI_PRUSS_H_ */
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