2017-12-19 15:49:01 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Intel Corporation
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2017-01-24 16:23:53 +00:00
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*/
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#ifndef _SCHEDULER_PMD_PRIVATE_H
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#define _SCHEDULER_PMD_PRIVATE_H
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2017-03-28 10:58:16 +00:00
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#include "rte_cryptodev_scheduler.h"
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2017-01-24 16:23:53 +00:00
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2017-05-22 13:54:30 +00:00
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#define CRYPTODEV_NAME_SCHEDULER_PMD crypto_scheduler
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/**< Scheduler Crypto PMD device name */
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2017-01-24 16:23:53 +00:00
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#define PER_SLAVE_BUFF_SIZE (256)
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2018-06-29 14:00:37 +00:00
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extern int scheduler_logtype_driver;
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#define CR_SCHED_LOG(level, fmt, args...) \
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rte_log(RTE_LOG_ ## level, scheduler_logtype_driver, \
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"%s() line %u: "fmt "\n", __func__, __LINE__, ##args)
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2017-01-24 16:23:53 +00:00
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struct scheduler_slave {
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uint8_t dev_id;
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uint16_t qp_id;
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uint32_t nb_inflight_cops;
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2017-06-30 14:34:21 +00:00
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uint8_t driver_id;
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2017-01-24 16:23:53 +00:00
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};
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struct scheduler_ctx {
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void *private_ctx;
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/**< private scheduler context pointer */
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struct rte_cryptodev_capabilities *capabilities;
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uint32_t nb_capabilities;
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uint32_t max_nb_queue_pairs;
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2017-03-30 13:39:18 +00:00
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struct scheduler_slave slaves[RTE_CRYPTODEV_SCHEDULER_MAX_NB_SLAVES];
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2017-01-24 16:23:53 +00:00
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uint32_t nb_slaves;
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enum rte_cryptodev_scheduler_mode mode;
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struct rte_cryptodev_scheduler_ops ops;
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uint8_t reordering_enabled;
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char name[RTE_CRYPTODEV_SCHEDULER_NAME_MAX_LEN];
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char description[RTE_CRYPTODEV_SCHEDULER_DESC_MAX_LEN];
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2018-05-21 10:22:12 +00:00
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uint16_t wc_pool[RTE_MAX_LCORE];
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2017-07-05 16:14:38 +00:00
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uint16_t nb_wc;
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2017-04-18 11:28:14 +00:00
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char *init_slave_names[RTE_CRYPTODEV_SCHEDULER_MAX_NB_SLAVES];
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int nb_init_slaves;
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2017-01-24 16:23:53 +00:00
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} __rte_cache_aligned;
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struct scheduler_qp_ctx {
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void *private_qp_ctx;
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2017-04-10 15:00:54 +00:00
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uint32_t max_nb_objs;
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2017-03-02 14:18:34 +00:00
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struct rte_ring *order_ring;
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2017-01-24 16:23:53 +00:00
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uint32_t seqn;
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} __rte_cache_aligned;
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2018-10-28 23:57:39 +00:00
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extern uint8_t cryptodev_scheduler_driver_id;
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2017-06-30 14:34:21 +00:00
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2017-05-13 09:27:25 +00:00
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static __rte_always_inline uint16_t
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2017-03-02 14:18:34 +00:00
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get_max_enqueue_order_count(struct rte_ring *order_ring, uint16_t nb_ops)
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{
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uint32_t count = rte_ring_free_count(order_ring);
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return count > nb_ops ? nb_ops : count;
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}
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2017-05-13 09:27:25 +00:00
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static __rte_always_inline void
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2017-03-02 14:18:34 +00:00
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scheduler_order_insert(struct rte_ring *order_ring,
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struct rte_crypto_op **ops, uint16_t nb_ops)
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{
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rte_ring_sp_enqueue_burst(order_ring, (void **)ops, nb_ops, NULL);
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}
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#define SCHEDULER_GET_RING_OBJ(order_ring, pos, op) do { \
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struct rte_crypto_op **ring = (void *)&order_ring[1]; \
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op = ring[(order_ring->cons.head + pos) & order_ring->mask]; \
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} while (0)
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2017-05-13 09:27:25 +00:00
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static __rte_always_inline uint16_t
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2017-03-02 14:18:34 +00:00
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scheduler_order_drain(struct rte_ring *order_ring,
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struct rte_crypto_op **ops, uint16_t nb_ops)
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{
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struct rte_crypto_op *op;
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uint32_t nb_objs = rte_ring_count(order_ring);
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uint32_t nb_ops_to_deq = 0;
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2017-04-19 14:47:02 +00:00
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uint32_t nb_ops_deqd = 0;
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2017-03-02 14:18:34 +00:00
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if (nb_objs > nb_ops)
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nb_objs = nb_ops;
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while (nb_ops_to_deq < nb_objs) {
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SCHEDULER_GET_RING_OBJ(order_ring, nb_ops_to_deq, op);
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2017-07-17 15:25:00 +00:00
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if (op->status == RTE_CRYPTO_OP_STATUS_NOT_PROCESSED)
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2017-03-02 14:18:34 +00:00
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break;
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nb_ops_to_deq++;
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}
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if (nb_ops_to_deq)
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2017-04-19 14:47:02 +00:00
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nb_ops_deqd = rte_ring_sc_dequeue_bulk(order_ring,
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(void **)ops, nb_ops_to_deq, NULL);
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2017-03-02 14:18:34 +00:00
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2017-04-19 14:47:02 +00:00
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return nb_ops_deqd;
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2017-03-02 14:18:34 +00:00
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}
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2017-01-24 16:23:53 +00:00
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/** device specific operations function pointer structure */
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extern struct rte_cryptodev_ops *rte_crypto_scheduler_pmd_ops;
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#endif /* _SCHEDULER_PMD_PRIVATE_H */
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