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numam-dpdk/mk/rte.cpuflags.mk

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mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# BSD LICENSE
remove trailing whitespaces This commit removes trailing whitespace from lines in files. Almost all files are affected, as the BSD license copyright header had trailing whitespace on 4 lines in it [hence the number of files reporting 8 lines changed in the diffstat]. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> [Thomas: remove spaces before tabs in libs] [Thomas: remove more trailing spaces in non-C files] Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-03 23:42:50 +00:00
#
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
# All rights reserved.
remove trailing whitespaces This commit removes trailing whitespace from lines in files. Almost all files are affected, as the BSD license copyright header had trailing whitespace on 4 lines in it [hence the number of files reporting 8 lines changed in the diffstat]. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> [Thomas: remove spaces before tabs in libs] [Thomas: remove more trailing spaces in non-C files] Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-03 23:42:50 +00:00
#
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
remove trailing whitespaces This commit removes trailing whitespace from lines in files. Almost all files are affected, as the BSD license copyright header had trailing whitespace on 4 lines in it [hence the number of files reporting 8 lines changed in the diffstat]. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> [Thomas: remove spaces before tabs in libs] [Thomas: remove more trailing spaces in non-C files] Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-03 23:42:50 +00:00
#
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# * Neither the name of Intel Corporation nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
remove trailing whitespaces This commit removes trailing whitespace from lines in files. Almost all files are affected, as the BSD license copyright header had trailing whitespace on 4 lines in it [hence the number of files reporting 8 lines changed in the diffstat]. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> [Thomas: remove spaces before tabs in libs] [Thomas: remove more trailing spaces in non-C files] Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2014-06-03 23:42:50 +00:00
#
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# this makefile is called from the generic rte.vars.mk and is
# used to set the RTE_CPUFLAG_* environment variables giving details
# of what instruction sets the target cpu supports.
mk: fix warnings when adding extra warning flags Starting with commit 9aa2053c6e81493b23346ff4e387903560de5c81 EXTRA_CFLAGS is sometimes being passed to the compiler without WERROR_FLAGS which can cause spurious warnings by the dozen, for example with when compiling with EXTRA_CFLAGS="-Wformat-security": cc1: warning: -Wformat-security ignored without -Wformat [-Wformat-security] Passing WERROR_FLAGS to AUTO_CPU helper makes the warning flag usage consistent throughout the codebase, silencing the warnings. Fixes: 9aa2053c6e81 ("mk: influence CPU flags with user input") Signed-off-by: Panu Matilainen <pmatilai@redhat.com> Acked-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2015-12-07 12:56:43 +00:00
AUTO_CPUFLAGS := $(shell $(CC) $(MACHINE_CFLAGS) $(WERROR_FLAGS) $(EXTRA_CFLAGS) -dM -E - < /dev/null)
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# adding flags to CPUFLAGS
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE__),)
CPUFLAGS += SSE
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE2__),)
CPUFLAGS += SSE2
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE3__),)
CPUFLAGS += SSE3
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSSE3__),)
CPUFLAGS += SSSE3
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE4_1__),)
CPUFLAGS += SSE4_1
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE4_2__),)
CPUFLAGS += SSE4_2
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__AES__),)
CPUFLAGS += AES
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__PCLMUL__),)
CPUFLAGS += PCLMULQDQ
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__AVX__),)
CPUFLAGS += AVX
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),)
CPUFLAGS += RDRAND
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),)
CPUFLAGS += FSGSBASE
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),)
CPUFLAGS += F16C
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__AVX2__),)
CPUFLAGS += AVX2
endif
eal/ppc: cpu flag checks for IBM Power IBM Power processor doesn't have CPU flag hardware registers. This patch uses aux vector software register to get CPU flags and add CPU flag checking support for IBM Power architecture. Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com> Acked-by: David Marchand <david.marchand@6wind.com>
2014-11-25 22:17:11 +00:00
# IBM Power CPU flags
ifneq ($(filter $(AUTO_CPUFLAGS),__PPC64__),)
CPUFLAGS += PPC64
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__PPC32__),)
CPUFLAGS += PPC32
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__vector),)
CPUFLAGS += ALTIVEC
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__builtin_vsx_xvnmaddadp),)
CPUFLAGS += VSX
endif
eal/arm: add CPU flags for ARMv7 This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2015-11-02 23:47:22 +00:00
# ARM flags
ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_NEON_FP),)
CPUFLAGS += NEON
endif
hash: use armv8-a CRC32 instructions armv8-a has optional CRC32 extension, march=armv8-a+crc enables code generation for the ARMv8-A architecture together with the optional CRC32 extensions. added RTE_MACHINE_CPUFLAG_CRC32 to detect the availability of CRC32 extension in compile time. At run-time, The RTE_CPUFLAG_CRC32 can be used to find the availability. armv8-a+crc target support added in GCC 4.9, Used inline assembly and emulated __ARM_FEATURE_CRC32 to work with tool-chain < 4.9 Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-23 18:45:36 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_FEATURE_CRC32),)
CPUFLAGS += CRC32
endif
eal/arm: add CPU flags for ARMv7 This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2015-11-02 23:47:22 +00:00
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
MACHINE_CFLAGS += $(addprefix -DRTE_MACHINE_CPUFLAG_,$(CPUFLAGS))
# To strip whitespace
comma:= ,
empty:=
space:= $(empty) $(empty)
CPUFLAGSTMP1 := $(addprefix RTE_CPUFLAG_,$(CPUFLAGS))
CPUFLAGSTMP2 := $(subst $(space),$(comma),$(CPUFLAGSTMP1))
MACHINE_CFLAGS += -DRTE_COMPILE_TIME_CPUFLAGS=$(CPUFLAGSTMP2)
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