2020-07-20 06:26:05 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2020 Mellanox Technologies, Ltd
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*/
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2020-07-20 06:26:07 +00:00
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#include <rte_malloc.h>
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#include <rte_log.h>
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#include <rte_errno.h>
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#include <rte_bus_pci.h>
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#include <rte_pci.h>
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#include <rte_regexdev.h>
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#include <rte_regexdev_core.h>
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#include <rte_regexdev_driver.h>
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#include <mlx5_glue.h>
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#include <mlx5_devx_cmds.h>
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#include <mlx5_prm.h>
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2020-07-20 06:26:05 +00:00
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#include "mlx5_regex.h"
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2020-07-20 06:26:06 +00:00
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#include "mlx5_regex_utils.h"
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2020-07-20 06:26:09 +00:00
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#include "mlx5_rxp_csrs.h"
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2020-07-20 06:26:06 +00:00
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int mlx5_regex_logtype;
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2020-07-20 06:26:08 +00:00
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const struct rte_regexdev_ops mlx5_regexdev_ops = {
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.dev_info_get = mlx5_regex_info_get,
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2020-07-20 06:26:10 +00:00
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.dev_configure = mlx5_regex_configure,
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2020-07-20 06:26:11 +00:00
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.dev_db_import = mlx5_regex_rules_db_import,
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2020-07-20 06:26:12 +00:00
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.dev_qp_setup = mlx5_regex_qp_setup,
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2020-07-20 06:26:08 +00:00
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};
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2020-07-20 06:26:07 +00:00
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static struct ibv_device *
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mlx5_regex_get_ib_device_match(struct rte_pci_addr *addr)
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{
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int n;
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struct ibv_device **ibv_list = mlx5_glue->get_device_list(&n);
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struct ibv_device *ibv_match = NULL;
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if (!ibv_list) {
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rte_errno = ENOSYS;
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return NULL;
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}
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while (n-- > 0) {
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struct rte_pci_addr pci_addr;
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DRV_LOG(DEBUG, "Checking device \"%s\"..", ibv_list[n]->name);
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if (mlx5_dev_to_pci_addr(ibv_list[n]->ibdev_path, &pci_addr))
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continue;
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if (rte_pci_addr_cmp(addr, &pci_addr))
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continue;
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ibv_match = ibv_list[n];
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break;
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}
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if (!ibv_match)
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rte_errno = ENOENT;
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mlx5_glue->free_device_list(ibv_list);
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return ibv_match;
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}
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2020-07-20 06:26:09 +00:00
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static int
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mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines)
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{
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uint32_t fpga_ident = 0;
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int err;
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int i;
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for (i = 0; i < num_engines; i++) {
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err = mlx5_devx_regex_register_read(ctx, i,
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MLX5_RXP_CSR_IDENTIFIER,
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&fpga_ident);
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fpga_ident = (fpga_ident & (0x0000FFFF));
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if (err || fpga_ident != MLX5_RXP_IDENTIFIER) {
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DRV_LOG(ERR, "Failed setup RXP %d err %d database "
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"memory 0x%x", i, err, fpga_ident);
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if (!err)
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err = EINVAL;
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return err;
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}
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}
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return 0;
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}
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2020-07-20 06:26:07 +00:00
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static void
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mlx5_regex_get_name(char *name, struct rte_pci_device *pci_dev __rte_unused)
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{
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sprintf(name, "mlx5_regex_%02x:%02x.%02x", pci_dev->addr.bus,
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pci_dev->addr.devid, pci_dev->addr.function);
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}
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static int
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mlx5_regex_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
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struct rte_pci_device *pci_dev)
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{
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struct ibv_device *ibv;
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struct mlx5_regex_priv *priv = NULL;
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struct ibv_context *ctx = NULL;
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struct mlx5_hca_attr attr;
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char name[RTE_REGEXDEV_NAME_MAX_LEN];
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int ret;
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ibv = mlx5_regex_get_ib_device_match(&pci_dev->addr);
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if (!ibv) {
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DRV_LOG(ERR, "No matching IB device for PCI slot "
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PCI_PRI_FMT ".", pci_dev->addr.domain,
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pci_dev->addr.bus, pci_dev->addr.devid,
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pci_dev->addr.function);
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return -rte_errno;
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}
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DRV_LOG(INFO, "PCI information matches for device \"%s\".",
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ibv->name);
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ctx = mlx5_glue->dv_open_device(ibv);
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if (!ctx) {
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DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name);
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rte_errno = ENODEV;
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return -rte_errno;
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}
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ret = mlx5_devx_cmd_query_hca_attr(ctx, &attr);
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if (ret) {
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DRV_LOG(ERR, "Unable to read HCA capabilities.");
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rte_errno = ENOTSUP;
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goto error;
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} else if (!attr.regex || attr.regexp_num_of_engines == 0) {
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DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
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"old FW/OFED version?");
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rte_errno = ENOTSUP;
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goto error;
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}
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2020-07-20 06:26:09 +00:00
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if (mlx5_regex_engines_status(ctx, 2)) {
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DRV_LOG(ERR, "RegEx engine error.");
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rte_errno = ENOMEM;
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goto error;
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}
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2020-07-20 06:26:07 +00:00
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priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv),
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RTE_CACHE_LINE_SIZE);
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if (!priv) {
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DRV_LOG(ERR, "Failed to allocate private memory.");
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rte_errno = ENOMEM;
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goto error;
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}
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priv->ctx = ctx;
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2020-07-20 06:26:11 +00:00
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priv->nb_engines = 2; /* attr.regexp_num_of_engines */
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/* Default RXP programming mode to Shared. */
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priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE;
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2020-07-20 06:26:07 +00:00
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mlx5_regex_get_name(name, pci_dev);
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priv->regexdev = rte_regexdev_register(name);
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if (priv->regexdev == NULL) {
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DRV_LOG(ERR, "Failed to register RegEx device.");
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rte_errno = rte_errno ? rte_errno : EINVAL;
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goto error;
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}
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2020-07-20 06:26:11 +00:00
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ret = mlx5_glue->devx_query_eqn(ctx, 0, &priv->eqn);
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if (ret) {
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DRV_LOG(ERR, "can't query event queue number.");
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rte_errno = ENOMEM;
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goto error;
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}
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priv->uar = mlx5_glue->devx_alloc_uar(ctx, 0);
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if (!priv->uar) {
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DRV_LOG(ERR, "can't allocate uar.");
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rte_errno = ENOMEM;
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goto error;
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}
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priv->pd = mlx5_glue->alloc_pd(ctx);
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if (!priv->pd) {
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DRV_LOG(ERR, "can't allocate pd.");
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rte_errno = ENOMEM;
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goto error;
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}
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2020-07-20 06:26:07 +00:00
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priv->regexdev->dev_ops = &mlx5_regexdev_ops;
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priv->regexdev->device = (struct rte_device *)pci_dev;
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priv->regexdev->data->dev_private = priv;
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2020-07-20 06:26:10 +00:00
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priv->regexdev->state = RTE_REGEXDEV_READY;
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2020-07-20 06:26:07 +00:00
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return 0;
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error:
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2020-07-20 06:26:11 +00:00
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if (priv->pd)
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mlx5_glue->dealloc_pd(priv->pd);
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if (priv->uar)
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mlx5_glue->devx_free_uar(priv->uar);
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if (priv->regexdev)
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rte_regexdev_unregister(priv->regexdev);
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2020-07-20 06:26:07 +00:00
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if (ctx)
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mlx5_glue->close_device(ctx);
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if (priv)
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rte_free(priv);
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return -rte_errno;
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}
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static int
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mlx5_regex_pci_remove(struct rte_pci_device *pci_dev)
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{
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char name[RTE_REGEXDEV_NAME_MAX_LEN];
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struct rte_regexdev *dev;
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struct mlx5_regex_priv *priv = NULL;
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mlx5_regex_get_name(name, pci_dev);
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dev = rte_regexdev_get_device_by_name(name);
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if (!dev)
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return 0;
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priv = dev->data->dev_private;
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if (priv) {
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2020-07-20 06:26:11 +00:00
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if (priv->pd)
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mlx5_glue->dealloc_pd(priv->pd);
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if (priv->uar)
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mlx5_glue->devx_free_uar(priv->uar);
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if (priv->regexdev)
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rte_regexdev_unregister(priv->regexdev);
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2020-07-20 06:26:07 +00:00
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if (priv->ctx)
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mlx5_glue->close_device(priv->ctx);
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if (priv->regexdev)
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rte_regexdev_unregister(priv->regexdev);
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rte_free(priv);
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}
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return 0;
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}
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static const struct rte_pci_id mlx5_regex_pci_id_map[] = {
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{
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RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
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PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF)
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},
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{
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.vendor_id = 0
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}
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};
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static struct rte_pci_driver mlx5_regex_driver = {
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.driver = {
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.name = "mlx5_regex",
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},
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.id_table = mlx5_regex_pci_id_map,
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.probe = mlx5_regex_pci_probe,
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.remove = mlx5_regex_pci_remove,
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.drv_flags = 0,
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};
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RTE_INIT(rte_mlx5_regex_init)
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{
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if (mlx5_glue)
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rte_pci_register(&mlx5_regex_driver);
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}
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2020-07-20 06:26:06 +00:00
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RTE_LOG_REGISTER(mlx5_regex_logtype, pmd.regex.mlx5, NOTICE)
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2020-07-20 06:26:07 +00:00
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RTE_PMD_EXPORT_NAME(net_mlx5_regex, __COUNTER__);
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RTE_PMD_REGISTER_PCI_TABLE(net_mlx5_regex, mlx5_regex_pci_id_map);
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RTE_PMD_REGISTER_KMOD_DEP(net_mlx5_regex, "* ib_uverbs & mlx5_core & mlx5_ib");
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