2019-01-10 21:06:28 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#ifndef _IPSEC_SQN_H_
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#define _IPSEC_SQN_H_
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#define WINDOW_BUCKET_BITS 6 /* uint64_t */
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#define WINDOW_BUCKET_SIZE (1 << WINDOW_BUCKET_BITS)
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#define WINDOW_BIT_LOC_MASK (WINDOW_BUCKET_SIZE - 1)
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/* minimum number of bucket, power of 2*/
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#define WINDOW_BUCKET_MIN 2
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#define WINDOW_BUCKET_MAX (INT16_MAX + 1)
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#define IS_ESN(sa) ((sa)->sqn_mask == UINT64_MAX)
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2019-01-10 21:06:31 +00:00
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#define SQN_ATOMIC(sa) ((sa)->type & RTE_IPSEC_SATP_SQN_ATOM)
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2019-01-10 21:06:30 +00:00
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/*
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* gets SQN.hi32 bits, SQN supposed to be in network byte order.
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*/
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static inline rte_be32_t
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sqn_hi32(rte_be64_t sqn)
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{
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#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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return (sqn >> 32);
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#else
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return sqn;
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#endif
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}
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/*
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* gets SQN.low32 bits, SQN supposed to be in network byte order.
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*/
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static inline rte_be32_t
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sqn_low32(rte_be64_t sqn)
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{
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#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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return sqn;
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#else
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return (sqn >> 32);
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#endif
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}
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/*
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* gets SQN.low16 bits, SQN supposed to be in network byte order.
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*/
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static inline rte_be16_t
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sqn_low16(rte_be64_t sqn)
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{
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#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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return sqn;
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#else
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return (sqn >> 48);
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#endif
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}
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/*
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* According to RFC4303 A2.1, determine the high-order bit of sequence number.
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* use 32bit arithmetic inside, return uint64_t.
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*/
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static inline uint64_t
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reconstruct_esn(uint64_t t, uint32_t sqn, uint32_t w)
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{
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uint32_t th, tl, bl;
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tl = t;
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th = t >> 32;
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bl = tl - w + 1;
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/* case A: window is within one sequence number subspace */
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if (tl >= (w - 1))
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th += (sqn < bl);
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/* case B: window spans two sequence number subspaces */
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else if (th != 0)
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th -= (sqn >= bl);
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/* return constructed sequence with proper high-order bits */
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return (uint64_t)th << 32 | sqn;
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}
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/**
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* Perform the replay checking.
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*
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* struct rte_ipsec_sa contains the window and window related parameters,
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* such as the window size, bitmask, and the last acknowledged sequence number.
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*
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* Based on RFC 6479.
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* Blocks are 64 bits unsigned integers
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*/
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static inline int32_t
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esn_inb_check_sqn(const struct replay_sqn *rsn, const struct rte_ipsec_sa *sa,
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uint64_t sqn)
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{
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uint32_t bit, bucket;
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/* replay not enabled */
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if (sa->replay.win_sz == 0)
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return 0;
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/* seq is larger than lastseq */
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if (sqn > rsn->sqn)
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return 0;
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/* seq is outside window */
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if (sqn == 0 || sqn + sa->replay.win_sz < rsn->sqn)
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return -EINVAL;
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/* seq is inside the window */
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bit = sqn & WINDOW_BIT_LOC_MASK;
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bucket = (sqn >> WINDOW_BUCKET_BITS) & sa->replay.bucket_index_mask;
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/* already seen packet */
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if (rsn->window[bucket] & ((uint64_t)1 << bit))
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return -EINVAL;
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return 0;
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}
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/**
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* For outbound SA perform the sequence number update.
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*/
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static inline uint64_t
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esn_outb_update_sqn(struct rte_ipsec_sa *sa, uint32_t *num)
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{
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uint64_t n, s, sqn;
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n = *num;
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2019-01-10 21:06:31 +00:00
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if (SQN_ATOMIC(sa))
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sqn = (uint64_t)rte_atomic64_add_return(&sa->sqn.outb.atom, n);
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else {
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sqn = sa->sqn.outb.raw + n;
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sa->sqn.outb.raw = sqn;
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}
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2019-01-10 21:06:30 +00:00
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/* overflow */
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if (sqn > sa->sqn_mask) {
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s = sqn - sa->sqn_mask;
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*num = (s < n) ? n - s : 0;
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}
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return sqn - n;
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}
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/**
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* For inbound SA perform the sequence number and replay window update.
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*/
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static inline int32_t
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esn_inb_update_sqn(struct replay_sqn *rsn, const struct rte_ipsec_sa *sa,
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uint64_t sqn)
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{
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uint32_t bit, bucket, last_bucket, new_bucket, diff, i;
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/* handle ESN */
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if (IS_ESN(sa))
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sqn = reconstruct_esn(rsn->sqn, sqn, sa->replay.win_sz);
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/* seq is outside window*/
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if (sqn == 0 || sqn + sa->replay.win_sz < rsn->sqn)
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return -EINVAL;
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/* update the bit */
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bucket = (sqn >> WINDOW_BUCKET_BITS);
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/* check if the seq is within the range */
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if (sqn > rsn->sqn) {
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last_bucket = rsn->sqn >> WINDOW_BUCKET_BITS;
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diff = bucket - last_bucket;
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/* seq is way after the range of WINDOW_SIZE */
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if (diff > sa->replay.nb_bucket)
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diff = sa->replay.nb_bucket;
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for (i = 0; i != diff; i++) {
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new_bucket = (i + last_bucket + 1) &
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sa->replay.bucket_index_mask;
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rsn->window[new_bucket] = 0;
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}
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rsn->sqn = sqn;
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}
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bucket &= sa->replay.bucket_index_mask;
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bit = (uint64_t)1 << (sqn & WINDOW_BIT_LOC_MASK);
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/* already seen packet */
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if (rsn->window[bucket] & bit)
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return -EINVAL;
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rsn->window[bucket] |= bit;
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return 0;
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}
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/**
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* To achieve ability to do multiple readers single writer for
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* SA replay window information and sequence number (RSN)
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* basic RCU schema is used:
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* SA have 2 copies of RSN (one for readers, another for writers).
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* Each RSN contains a rwlock that has to be grabbed (for read/write)
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* to avoid races between readers and writer.
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* Writer is responsible to make a copy or reader RSN, update it
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* and mark newly updated RSN as readers one.
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* That approach is intended to minimize contention and cache sharing
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* between writer and readers.
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*/
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2019-01-10 21:06:31 +00:00
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/**
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* Copy replay window and SQN.
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*/
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static inline void
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rsn_copy(const struct rte_ipsec_sa *sa, uint32_t dst, uint32_t src)
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{
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uint32_t i, n;
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struct replay_sqn *d;
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const struct replay_sqn *s;
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d = sa->sqn.inb.rsn[dst];
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s = sa->sqn.inb.rsn[src];
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n = sa->replay.nb_bucket;
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d->sqn = s->sqn;
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for (i = 0; i != n; i++)
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d->window[i] = s->window[i];
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}
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/**
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* Get RSN for read-only access.
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*/
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static inline struct replay_sqn *
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rsn_acquire(struct rte_ipsec_sa *sa)
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{
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uint32_t n;
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struct replay_sqn *rsn;
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n = sa->sqn.inb.rdidx;
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rsn = sa->sqn.inb.rsn[n];
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if (!SQN_ATOMIC(sa))
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return rsn;
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/* check there are no writers */
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while (rte_rwlock_read_trylock(&rsn->rwl) < 0) {
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rte_pause();
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n = sa->sqn.inb.rdidx;
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rsn = sa->sqn.inb.rsn[n];
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rte_compiler_barrier();
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}
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return rsn;
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}
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/**
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* Release read-only access for RSN.
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*/
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static inline void
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rsn_release(struct rte_ipsec_sa *sa, struct replay_sqn *rsn)
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{
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if (SQN_ATOMIC(sa))
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rte_rwlock_read_unlock(&rsn->rwl);
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}
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/**
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* Start RSN update.
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*/
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static inline struct replay_sqn *
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rsn_update_start(struct rte_ipsec_sa *sa)
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{
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uint32_t k, n;
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struct replay_sqn *rsn;
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n = sa->sqn.inb.wridx;
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/* no active writers */
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RTE_ASSERT(n == sa->sqn.inb.rdidx);
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if (!SQN_ATOMIC(sa))
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return sa->sqn.inb.rsn[n];
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k = REPLAY_SQN_NEXT(n);
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sa->sqn.inb.wridx = k;
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rsn = sa->sqn.inb.rsn[k];
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rte_rwlock_write_lock(&rsn->rwl);
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rsn_copy(sa, k, n);
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return rsn;
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}
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/**
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* Finish RSN update.
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*/
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static inline void
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rsn_update_finish(struct rte_ipsec_sa *sa, struct replay_sqn *rsn)
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{
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uint32_t n;
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if (!SQN_ATOMIC(sa))
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return;
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n = sa->sqn.inb.wridx;
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RTE_ASSERT(n != sa->sqn.inb.rdidx);
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2019-01-14 12:07:39 +00:00
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RTE_ASSERT(rsn == sa->sqn.inb.rsn[n]);
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2019-01-10 21:06:31 +00:00
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rte_rwlock_write_unlock(&rsn->rwl);
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sa->sqn.inb.rdidx = n;
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}
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2019-01-10 21:06:28 +00:00
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#endif /* _IPSEC_SQN_H_ */
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