i40e: fix PF interrupt handler
'PFINT_ICR0_ENA' shouldn't be cleared in user space ISR, otherwise adminq interrupts might be missed during co-working with VF initialization. Signed-off-by: Helin Zhang <helin.zhang@intel.com> Acked-by: Jing Chen <jing.d.chen@intel.com>
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@ -3574,7 +3574,6 @@ i40e_dev_interrupt_delayed_handler(void *param)
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i40e_dev_link_update(dev, 0);
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_rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
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I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, I40E_PFINT_ICR0_ENA_MASK);
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i40e_pf_enable_irq0(hw);
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rte_intr_enable(&(dev->pci_dev->intr_handle));
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}
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@ -3601,7 +3600,6 @@ i40e_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
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/* Disable interrupt */
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i40e_pf_disable_irq0(hw);
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I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, 0);
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/* read out interrupt causes */
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icr0 = I40E_READ_REG(hw, I40E_PFINT_ICR0);
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@ -3663,7 +3661,6 @@ i40e_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
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done:
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/* Enable interrupt */
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I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, I40E_PFINT_ICR0_ENA_MASK);
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i40e_pf_enable_irq0(hw);
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rte_intr_enable(&(dev->pci_dev->intr_handle));
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}
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