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net/hinic: add build and doc files

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Add build and doc files along with hinic_pmd_ethdev.c
which just includes PMD register and log initialization
for compilation.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This commit is contained in:
Ziyang Xuan 2019-06-27 16:18:20 +08:00 committed by Ferruh Yigit
parent 81d53291a4
commit 1d09792a27
22 changed files with 560 additions and 0 deletions
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8
MAINTAINERS
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@ -602,6 +602,14 @@ F: drivers/net/enic/
F: doc/guides/nics/enic.rst
F: doc/guides/nics/features/enic.ini
Huawei hinic
M: Ziyang Xuan <xuanziyang2@huawei.com>
M: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
M: Guoyang Zhou <zhouguoyang@huawei.com>
F: drivers/net/hinic/
F: doc/guides/nics/hinic.rst
F: doc/guides/nics/features/hinic.ini
Intel e1000
M: Wenzhuo Lu <wenzhuo.lu@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel

5
config/common_base
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@ -276,6 +276,11 @@ CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
#
# Compile burst-oriented HINIC PMD driver
#
CONFIG_RTE_LIBRTE_HINIC_PMD=n
#
# Compile burst-oriented IXGBE PMD driver
#

5
config/common_linux
View File

@ -58,3 +58,8 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=y
# NXP ENETC PMD Driver
#
CONFIG_RTE_LIBRTE_ENETC_PMD=y
#
# HINIC PMD driver
#
CONFIG_RTE_LIBRTE_HINIC_PMD=y

1
config/defconfig_arm-armv7a-linuxapp-gcc
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@ -54,3 +54,4 @@ CONFIG_RTE_LIBRTE_QEDE_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_LIBRTE_NFP_PMD=n
CONFIG_RTE_LIBRTE_HINIC_PMD=n

5
config/defconfig_i686-native-linuxapp-gcc
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@ -54,3 +54,8 @@ CONFIG_RTE_LIBRTE_NFP_PMD=n
# 32-bit doesn't break up memory in lists, but does have VA allocation limit
CONFIG_RTE_MAX_MEM_MB=2048
#
# HINIC PMD is not supported on 32-bit
#
CONFIG_RTE_LIBRTE_HINIC_PMD=n

5
config/defconfig_i686-native-linuxapp-icc
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@ -54,3 +54,8 @@ CONFIG_RTE_LIBRTE_NFP_PMD=n
# 32-bit doesn't break up memory in lists, but does have VA allocation limit
CONFIG_RTE_MAX_MEM_MB=2048
#
# HINIC PMD is not supported on 32-bit
#
CONFIG_RTE_LIBRTE_HINIC_PMD=n

1
config/defconfig_ppc_64-power8-linuxapp-gcc
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@ -56,3 +56,4 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_LIBRTE_HINIC_PMD=n

5
config/defconfig_x86_64-native-linuxapp-icc
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@ -17,3 +17,8 @@ CONFIG_RTE_TOOLCHAIN_ICC=y
# Solarflare PMD build is not supported using icc toolchain
#
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
#
# HINIC PMD build is not supported using icc toolchain
#
CONFIG_RTE_LIBRTE_HINIC_PMD=n

5
config/defconfig_x86_x32-native-linuxapp-gcc
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@ -34,3 +34,8 @@ CONFIG_RTE_LIBRTE_NFP_PMD=n
# 32-bit doesn't break up memory in lists, but does have VA allocation limit
CONFIG_RTE_MAX_MEM_MB=2048
#
# HINIC PMD is not supported on 32-bit
#
CONFIG_RTE_LIBRTE_HINIC_PMD=n

37
doc/guides/nics/features/hinic.ini Normal file
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@ -0,0 +1,37 @@
;
; Supported features of the 'hinic' network poll mode driver.
;
; Refer to default.ini for the full list of available PMD features.
;
[Features]
Speed capabilities = Y
Link status = Y
Link status event = Y
Free Tx mbuf on demand = Y
Queue start/stop = Y
Jumbo frame = N
Scattered Rx = Y
TSO = Y
Promiscuous mode = Y
Unicast MAC filter = Y
Multicast MAC filter = Y
RSS hash = Y
RSS key update = Y
RSS reta update = Y
Inner RSS = Y
CRC offload = Y
L3 checksum offload = Y
L4 checksum offload = Y
Inner L3 checksum = Y
Inner L4 checksum = Y
Basic stats = Y
Extended stats = Y
Stats per queue = Y
Linux UIO = Y
Linux VFIO = Y
BSD nic_uio = N
x86-64 = Y
ARMv8 = Y
ARMv7 = N
x86-32 = N
Power8 = N

58
doc/guides/nics/hinic.rst Normal file
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@ -0,0 +1,58 @@
.. SPDX-License-Identifier: BSD-3-Clause
Copyright(c) 2017 Huawei Technologies Co., Ltd
HINIC Poll Mode Driver
======================
The hinic PMD (librte_pmd_hinic) provides poll mode driver support
for 25Gbps Huawei Intelligent PCIE Network Adapters based on the
Huawei Ethernet Controller Hi1822.
Features
--------
- Multi arch support: x86_64, ARMv8.
- Multiple queues for TX and RX
- Receiver Side Scaling (RSS)
- MAC/VLAN filtering
- Checksum offload
- TSO offload
- Promiscuous mode
- Port hardware statistics
- Link state information
- Link flow control
- Scattered and gather for TX and RX
Prerequisites
-------------
- Learning about Huawei Hi1822 IN200 Series Intelligent NICs using
`<https://e.huawei.com/en/products/cloud-computing-dc/servers/pcie-ssd/in-card>`_.
- Getting the latest product documents and software supports using
`<https://support.huawei.com/enterprise/en/intelligent-accelerator-components/in500-solution-pid-23507369>`_.
- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
Pre-Installation Configuration
------------------------------
Config File Options
~~~~~~~~~~~~~~~~~~~
The following options can be modified in the ``config`` file.
- ``CONFIG_RTE_LIBRTE_HINIC_PMD`` (default ``y``)
Driver compilation and testing
------------------------------
Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
for details.
Limitations or Known issues
---------------------------
Build with ICC is not supported yet.
X86-32, Power8, ARMv7 and BSD are not supported yet.

1
doc/guides/nics/index.rst
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@ -27,6 +27,7 @@ Network Interface Controller Drivers
enetc
enic
fm10k
hinic
i40e
ice
ifc

6
doc/guides/rel_notes/release_19_08.rst
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@ -82,6 +82,12 @@ New Features
of Ethernet controllers. These controllers support link speeds up to
200Gbps, 50G PAM-4, and PCIe 4.0.
* **Added hinic PMD.**
Added the new ``hinic`` net driver for Huawei Intelligent PCIE Network
Adapters based on the Huawei Ethernet Controller Hi1822.
See the :doc:`../nics/hinic` guide for more details on this new driver.
* **Updated the ice driver.**
Updated ice driver with new features and improvements, including:

1
drivers/net/Makefile
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@ -29,6 +29,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc
DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic
DIRS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe
DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k
DIRS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic
DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e
DIRS-$(CONFIG_RTE_LIBRTE_IAVF_PMD) += iavf
DIRS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += ice

64
drivers/net/hinic/Makefile Normal file
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@ -0,0 +1,64 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Huawei Technologies Co., Ltd
include $(RTE_SDK)/mk/rte.vars.mk
#
# library name
#
LIB = librte_pmd_hinic.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
CFLAGS += -D__ARM64_NEON__
else ifeq ($(CONFIG_RTE_ARCH_X86_64),y)
CFLAGS += -D__X86_64_SSE__
endif
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_hash
LDLIBS += -lrte_bus_pci
EXPORT_MAP := rte_pmd_hinic_version.map
LIBABIVER := 1
#
# CFLAGS for 32-bits platforms
#
ifneq ($(CONFIG_RTE_ARCH_64),y)
ifeq ($(CONFIG_RTE_TOOLCHAIN_ICC),y)
#
# CFLAGS for icc
#
CFLAGS += -diag-disable 2259
else
#
# CFLAGS for gcc
#
CFLAGS += -Wno-int-to-pointer-cast
CFLAGS += -Wno-pointer-to-int-cast
endif
endif
VPATH += $(SRCDIR)/base
#
# all source are stored in SRCS-y
#
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_api_cmd.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_cfg.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_cmdq.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_eqs.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_hwdev.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_hwif.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_mgmt.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_niccfg.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_nicio.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_wq.c
SRCS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += hinic_pmd_ethdev.c
include $(RTE_SDK)/mk/rte.lib.mk

36
drivers/net/hinic/base/meson.build Normal file
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@ -0,0 +1,36 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Huawei Technologies Co., Ltd
sources = [
'hinic_pmd_api_cmd.c',
'hinic_pmd_cfg.c',
'hinic_pmd_cmdq.c',
'hinic_pmd_eqs.c',
'hinic_pmd_hwdev.c',
'hinic_pmd_hwif.c',
'hinic_pmd_mgmt.c',
'hinic_pmd_niccfg.c',
'hinic_pmd_nicio.c',
'hinic_pmd_wq.c',
]
extra_flags = []
# The driver runs only on arch64 machine, remove 32bit warnings
if not dpdk_conf.get('RTE_ARCH_64')
extra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']
endif
foreach flag: extra_flags
if cc.has_argument(flag)
cflags += flag
endif
endforeach
deps += ['hash']
c_args = cflags
base_lib = static_library('hinic_base', sources,
dependencies: [static_rte_eal, static_rte_ethdev, static_rte_bus_pci, static_rte_hash],
c_args: c_args)
base_objs = base_lib.extract_all_objects()

229
drivers/net/hinic/hinic_pmd_ethdev.c Normal file
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@ -0,0 +1,229 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2017 Huawei Technologies Co., Ltd
*/
#include <rte_pci.h>
#include <rte_bus_pci.h>
#include <rte_ethdev_pci.h>
#include <rte_malloc.h>
#include <rte_memcpy.h>
#include "base/hinic_compat.h"
#include "base/hinic_pmd_hwdev.h"
#include "base/hinic_pmd_niccfg.h"
#include "hinic_pmd_ethdev.h"
/* Vendor ID used by Huawei devices */
#define HINIC_HUAWEI_VENDOR_ID 0x19E5
/* Hinic devices */
#define HINIC_DEV_ID_PRD 0x1822
#define HINIC_DEV_ID_MEZZ_25GE 0x0210
#define HINIC_DEV_ID_MEZZ_40GE 0x020D
#define HINIC_DEV_ID_MEZZ_100GE 0x0205
#define HINIC_MIN_RX_BUF_SIZE 1024
#define HINIC_MAX_MAC_ADDRS 1
/** Driver-specific log messages type. */
int hinic_logtype;
static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
.nb_max = HINIC_MAX_QUEUE_DEPTH,
.nb_min = HINIC_MIN_QUEUE_DEPTH,
.nb_align = HINIC_RXD_ALIGN,
};
static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
.nb_max = HINIC_MAX_QUEUE_DEPTH,
.nb_min = HINIC_MIN_QUEUE_DEPTH,
.nb_align = HINIC_TXD_ALIGN,
};
/**
* Get link speed from NIC.
*
* @param dev
* Pointer to Ethernet device structure.
* @param speed_capa
* Pointer to link speed structure.
*/
static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
{
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
u32 supported_link, advertised_link;
int err;
#define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX)
#define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR)
#define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \
(1U << HINIC_25GE_BASE_CR_S) | \
(1U << HINIC_25GE_BASE_KR) | \
(1U << HINIC_25GE_BASE_CR))
#define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \
(1U << HINIC_40GE_BASE_CR4))
#define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \
(1U << HINIC_100GE_BASE_CR4))
err = hinic_get_link_mode(nic_dev->hwdev,
&supported_link, &advertised_link);
if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
advertised_link == HINIC_SUPPORTED_UNKNOWN) {
PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
nic_dev->proc_dev_name, dev->data->port_id);
} else {
*speed_capa = 0;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
*speed_capa |= ETH_LINK_SPEED_1G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
*speed_capa |= ETH_LINK_SPEED_10G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
*speed_capa |= ETH_LINK_SPEED_25G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
*speed_capa |= ETH_LINK_SPEED_40G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
*speed_capa |= ETH_LINK_SPEED_100G;
}
}
/**
* DPDK callback to get information about the device.
*
* @param dev
* Pointer to Ethernet device structure.
* @param info
* Pointer to Info structure output buffer.
*/
static void
hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
{
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
info->max_rx_queues = nic_dev->nic_cap.max_rqs;
info->max_tx_queues = nic_dev->nic_cap.max_sqs;
info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE;
info->max_mac_addrs = HINIC_MAX_MAC_ADDRS;
hinic_get_speed_capa(dev, &info->speed_capa);
info->rx_queue_offload_capa = 0;
info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM;
info->tx_queue_offload_capa = 0;
info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
DEV_TX_OFFLOAD_IPV4_CKSUM |
DEV_TX_OFFLOAD_UDP_CKSUM |
DEV_TX_OFFLOAD_TCP_CKSUM |
DEV_TX_OFFLOAD_SCTP_CKSUM |
DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
DEV_TX_OFFLOAD_TCP_TSO |
DEV_TX_OFFLOAD_MULTI_SEGS;
info->hash_key_size = HINIC_RSS_KEY_SIZE;
info->reta_size = HINIC_RSS_INDIR_SIZE;
info->rx_desc_lim = hinic_rx_desc_lim;
info->tx_desc_lim = hinic_tx_desc_lim;
}
static int hinic_func_init(__rte_unused struct rte_eth_dev *eth_dev)
{
return 0;
}
/**
* DPDK callback to close the device.
*
* @param dev
* Pointer to Ethernet device structure.
*/
static void hinic_dev_close(__rte_unused struct rte_eth_dev *dev)
{
}
static const struct eth_dev_ops hinic_pmd_ops = {
.dev_infos_get = hinic_dev_infos_get,
};
static int hinic_dev_init(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev;
pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
pci_dev->addr.domain, pci_dev->addr.bus,
pci_dev->addr.devid, pci_dev->addr.function,
(rte_eal_process_type() == RTE_PROC_PRIMARY) ?
"primary" : "secondary");
/* rte_eth_dev ops, rx_burst and tx_burst */
eth_dev->dev_ops = &hinic_pmd_ops;
return hinic_func_init(eth_dev);
}
static int hinic_dev_uninit(struct rte_eth_dev *dev)
{
struct hinic_nic_dev *nic_dev;
nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
hinic_dev_close(dev);
dev->dev_ops = NULL;
dev->rx_pkt_burst = NULL;
dev->tx_pkt_burst = NULL;
rte_free(dev->data->mac_addrs);
dev->data->mac_addrs = NULL;
return HINIC_OK;
}
static struct rte_pci_id pci_id_hinic_map[] = {
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
{.vendor_id = 0},
};
static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
{
return rte_eth_dev_pci_generic_probe(pci_dev,
sizeof(struct hinic_nic_dev), hinic_dev_init);
}
static int hinic_pci_remove(struct rte_pci_device *pci_dev)
{
return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
}
static struct rte_pci_driver rte_hinic_pmd = {
.id_table = pci_id_hinic_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
.probe = hinic_pci_probe,
.remove = hinic_pci_remove,
};
RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
RTE_INIT(hinic_init_log)
{
hinic_logtype = rte_log_register("pmd.net.hinic");
if (hinic_logtype >= 0)
rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
}

71
drivers/net/hinic/hinic_pmd_ethdev.h Normal file
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@ -0,0 +1,71 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2017 Huawei Technologies Co., Ltd
*/
#ifndef _HINIC_PMD_ETHDEV_H_
#define _HINIC_PMD_ETHDEV_H_
#include <rte_ethdev.h>
#include <rte_ethdev_core.h>
#include "base/hinic_compat.h"
#include "base/hinic_pmd_cfg.h"
#define HINIC_DEV_NAME_LEN (32)
#define HINIC_MAX_RX_QUEUES (64)
/* mbuf pool for copy invalid mbuf segs */
#define HINIC_COPY_MEMPOOL_DEPTH (128)
#define HINIC_COPY_MBUF_SIZE (4096)
#define SIZE_8BYTES(size) (ALIGN((u32)(size), 8) >> 3)
#define HINIC_PKTLEN_TO_MTU(pktlen) \
((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
#define HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev) \
((struct hinic_nic_dev *)(dev)->data->dev_private)
#define HINIC_MAX_QUEUE_DEPTH 4096
#define HINIC_MIN_QUEUE_DEPTH 128
#define HINIC_TXD_ALIGN 1
#define HINIC_RXD_ALIGN 1
enum hinic_dev_status {
HINIC_DEV_INIT,
HINIC_DEV_CLOSE,
HINIC_DEV_START,
HINIC_DEV_INTR_EN,
};
/* hinic nic_device */
struct hinic_nic_dev {
/* hardware device */
struct hinic_hwdev *hwdev;
struct hinic_txq **txqs;
struct hinic_rxq **rxqs;
struct rte_mempool *cpy_mpool;
u16 num_qps;
u16 num_sq;
u16 num_rq;
u16 mtu_size;
u8 rss_tmpl_idx;
u8 rss_indir_flag;
u8 num_rss;
u8 rx_queue_list[HINIC_MAX_RX_QUEUES];
/* info */
unsigned int flags;
struct nic_service_cap nic_cap;
u32 rx_mode_status; /* promisc allmulticast */
unsigned long dev_status;
/* dpdk only */
char proc_dev_name[HINIC_DEV_NAME_LEN];
/* PF0->COS4, PF1->COS5, PF2->COS6, PF3->COS7,
* vf: the same with associate pf
*/
u32 default_cos;
};
#endif /* _HINIC_PMD_ETHDEV_H_ */

11
drivers/net/hinic/meson.build Normal file
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@ -0,0 +1,11 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Huawei Technologies Co., Ltd
subdir('base')
objs = [base_objs]
sources = files(
'hinic_pmd_ethdev.c',
)
includes += include_directories('base')

4
drivers/net/hinic/rte_pmd_hinic_version.map Normal file
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@ -0,0 +1,4 @@
DPDK_19.08 {
local: *;
};

1
drivers/net/meson.build
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@ -17,6 +17,7 @@ drivers = ['af_packet',
'enic',
'failsafe',
'fm10k', 'i40e',
'hinic',
'iavf',
'ice',
'ifc',

1
mk/rte.app.mk
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@ -168,6 +168,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += -lrte_pmd_enetc
_LDLIBS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += -lrte_pmd_enic
_LDLIBS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += -lrte_pmd_fm10k
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += -lrte_pmd_failsafe
_LDLIBS-$(CONFIG_RTE_LIBRTE_HINIC_PMD) += -lrte_pmd_hinic
_LDLIBS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += -lrte_pmd_i40e
_LDLIBS-$(CONFIG_RTE_LIBRTE_IAVF_PMD) += -lrte_pmd_iavf
_LDLIBS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += -lrte_pmd_ice