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eal/x86: sort CPU extended features definitions

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Sort the definitions for extended features (leaf 0) to enhance
readability.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
This commit is contained in:
David Marchand 2021-10-08 14:07:15 +02:00
parent aae3037ab1
commit 2f3758751b
1 changed files with 19 additions and 19 deletions
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38
lib/eal/x86/rte_cpuflags.c
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@ -109,9 +109,27 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10)
FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11)
FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16)
FEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)
FEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18)
FEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)
FEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)
FEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)
FEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)
FEAT_DEF(WAITPKG, 0x00000007, 0, RTE_REG_ECX, 5)
FEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX, 1)
FEAT_DEF(WAITPKG, 0x00000007, 0, RTE_REG_ECX, 5)
FEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX, 6)
FEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX, 8)
FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)
FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)
FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)
FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)
FEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX, 14)
FEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)
FEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)
FEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)
FEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8)
FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0)
FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4)
@ -123,24 +141,6 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29)
FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8)
FEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)
FEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)
FEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)
FEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)
FEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)
FEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX, 1)
FEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX, 6)
FEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX, 8)
FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)
FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)
FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)
FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)
FEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX, 14)
FEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)
FEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)
FEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)
FEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8)
};
int