ixgbe/base: fix X550em flow control for KR backplane
For the KR backplane which is different from other backplane, in that we can't use auto-negotiation to determine the mode. Instead, use whatever the user configured. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
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64b91e05b1
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@ -1068,6 +1068,18 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
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IXGBE_NOT_IMPLEMENTED);
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}
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/**
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* ixgbe_setup_fc - Set up flow control
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* @hw: pointer to hardware structure
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*
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* Called at init time to set up flow control.
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**/
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s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
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{
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return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
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IXGBE_NOT_IMPLEMENTED);
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}
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/**
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* ixgbe_set_fw_drv_ver - Try to send the driver version number FW
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* @hw: pointer to hardware structure
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@ -128,6 +128,7 @@ s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
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s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
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bool vlan_on, bool *vfta_changed);
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s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
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s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
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s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
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u8 ver);
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s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw);
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@ -134,6 +134,7 @@ s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw)
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/* Flow Control */
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mac->ops.fc_enable = ixgbe_fc_enable_generic;
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mac->ops.setup_fc = ixgbe_setup_fc_generic;
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/* Link */
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mac->ops.get_link_capabilities = NULL;
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@ -200,19 +201,19 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
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}
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/**
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* ixgbe_setup_fc - Set up flow control
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* ixgbe_setup_fc_generic - Set up flow control
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* @hw: pointer to hardware structure
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*
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* Called at init time to set up flow control.
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**/
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STATIC s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
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s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw)
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{
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s32 ret_val = IXGBE_SUCCESS;
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u32 reg = 0, reg_bp = 0;
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u16 reg_cu = 0;
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bool locked = false;
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DEBUGFUNC("ixgbe_setup_fc");
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DEBUGFUNC("ixgbe_setup_fc_generic");
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/* Validate the requested mode */
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if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {
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@ -111,6 +111,7 @@ s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
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s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
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bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
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void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
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s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
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s32 ixgbe_validate_mac_addr(u8 *mac_addr);
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s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
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@ -3593,6 +3593,7 @@ struct ixgbe_mac_operations {
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/* Flow Control */
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s32 (*fc_enable)(struct ixgbe_hw *);
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s32 (*setup_fc)(struct ixgbe_hw *);
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/* Manageability interface */
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s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8);
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@ -3817,6 +3818,7 @@ struct ixgbe_hw {
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#define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P == 0) ? (0x4010) : (0x8010))
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#define IXGBE_KRM_LINK_CTRL_1(P) ((P == 0) ? (0x420C) : (0x820C))
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#define IXGBE_KRM_AN_CNTL_1(P) ((P == 0) ? (0x422C) : (0x822C))
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#define IXGBE_KRM_DSP_TXFFE_STATE_4(P) ((P == 0) ? (0x4634) : (0x8634))
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#define IXGBE_KRM_DSP_TXFFE_STATE_5(P) ((P == 0) ? (0x4638) : (0x8638))
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#define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P) ((P == 0) ? (0x4B00) : (0x8B00))
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@ -3839,6 +3841,9 @@ struct ixgbe_hw {
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#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE (1 << 29)
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#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART (1 << 31)
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#define IXGBE_KRM_AN_CNTL_1_SYM_PAUSE (1 << 28)
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#define IXGBE_KRM_AN_CNTL_1_ASM_PAUSE (1 << 29)
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#define IXGBE_KRM_DSP_TXFFE_STATE_C0_EN (1 << 6)
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#define IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN (1 << 15)
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#define IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN (1 << 16)
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@ -365,6 +365,10 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
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mac->ops.disable_sec_rx_path = NULL;
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mac->ops.enable_sec_rx_path = NULL;
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/* AUTOC register is not present in x550EM. */
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mac->ops.prot_autoc_read = NULL;
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mac->ops.prot_autoc_write = NULL;
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/* X550EM bus type is internal*/
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hw->bus.type = ixgbe_bus_type_internal;
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mac->ops.get_bus_info = ixgbe_get_bus_info_X550em;
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@ -378,6 +382,7 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
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mac->ops.get_supported_physical_layer =
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ixgbe_get_supported_physical_layer_X550em;
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mac->ops.setup_fc = ixgbe_setup_fc_X550em;
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/* PHY */
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phy->ops.init = ixgbe_init_phy_ops_X550em;
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phy->ops.identify = ixgbe_identify_phy_x550em;
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@ -2507,3 +2512,85 @@ s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed)
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*lcd_speed = IXGBE_LINK_SPEED_10GB_FULL;
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return status;
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}
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/**
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* ixgbe_setup_fc_X550em - Set up flow control
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* @hw: pointer to hardware structure
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*
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* Called at init time to set up flow control.
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**/
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s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw)
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{
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s32 ret_val = IXGBE_SUCCESS;
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u32 pause, asm_dir, reg_val;
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DEBUGFUNC("ixgbe_setup_fc_X550em");
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/* Validate the requested mode */
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if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {
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ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED,
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"ixgbe_fc_rx_pause not valid in strict IEEE mode\n");
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ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
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goto out;
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}
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/* 10gig parts do not have a word in the EEPROM to determine the
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* default flow control setting, so we explicitly set it to full.
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*/
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if (hw->fc.requested_mode == ixgbe_fc_default)
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hw->fc.requested_mode = ixgbe_fc_full;
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/* Determine PAUSE and ASM_DIR bits. */
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switch (hw->fc.requested_mode) {
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case ixgbe_fc_none:
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pause = 0;
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asm_dir = 0;
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break;
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case ixgbe_fc_tx_pause:
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pause = 0;
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asm_dir = 1;
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break;
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case ixgbe_fc_rx_pause:
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/* Rx Flow control is enabled and Tx Flow control is
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* disabled by software override. Since there really
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* isn't a way to advertise that we are capable of RX
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* Pause ONLY, we will advertise that we support both
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* symmetric and asymmetric Rx PAUSE, as such we fall
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* through to the fc_full statement. Later, we will
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* disable the adapter's ability to send PAUSE frames.
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*/
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case ixgbe_fc_full:
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pause = 1;
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asm_dir = 1;
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break;
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default:
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ERROR_REPORT1(IXGBE_ERROR_ARGUMENT,
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"Flow control param set incorrectly\n");
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ret_val = IXGBE_ERR_CONFIG;
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goto out;
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}
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if (hw->phy.media_type == ixgbe_media_type_backplane) {
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ret_val = ixgbe_read_iosf_sb_reg_x550(hw,
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IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),
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IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val);
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if (ret_val != IXGBE_SUCCESS)
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goto out;
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reg_val &= ~(IXGBE_KRM_AN_CNTL_1_SYM_PAUSE |
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IXGBE_KRM_AN_CNTL_1_ASM_PAUSE);
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if (pause)
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reg_val |= IXGBE_KRM_AN_CNTL_1_SYM_PAUSE;
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if (asm_dir)
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reg_val |= IXGBE_KRM_AN_CNTL_1_ASM_PAUSE;
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ret_val = ixgbe_write_iosf_sb_reg_x550(hw,
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IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),
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IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
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/* Not all devices fully support AN. */
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if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR)
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hw->fc.disable_fc_autoneg = true;
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}
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out:
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return ret_val;
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}
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@ -89,6 +89,7 @@ u32 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw);
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void ixgbe_disable_rx_x550(struct ixgbe_hw *hw);
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s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed);
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s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw);
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s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw);
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s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg_wait_to_complete);
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