baseband/acc200: add queue configuration
Added function to create and configure queues for the ACC200 device. Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
This commit is contained in:
Nicolas Chautru
Akhil Goyal
parent
fb43071542
commit
40e3adbdd3
@ -100,6 +100,7 @@
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#define ACC_LIMIT_DL_MUX_BITS 534
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#define ACC_NUM_QGRPS_PER_WORD 8
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#define ACC_MAX_NUM_QGRPS 32
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#define ACC_RING_SIZE_GRANULARITY 64
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/* Constants from K0 computation from 3GPP 38.212 Table 5.4.2.1-2 */
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#define ACC_N_ZC_1 66 /* N = 66 Zc for BG 1 */
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@ -211,16 +211,401 @@ fetch_acc200_config(struct rte_bbdev *dev)
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acc_conf->q_fft.aq_depth_log2);
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}
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/* Allocate 64MB memory used for all software rings. */
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static int
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acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
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{
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uint32_t phys_low, phys_high, value;
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struct acc_device *d = dev->data->dev_private;
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const struct acc200_registry_addr *reg_addr;
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int ret;
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if (d->pf_device && !d->acc_conf.pf_mode_en) {
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rte_bbdev_log(NOTICE,
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"%s has PF mode disabled. This PF can't be used.",
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dev->data->name);
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return -ENODEV;
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}
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if (!d->pf_device && d->acc_conf.pf_mode_en) {
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rte_bbdev_log(NOTICE,
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"%s has PF mode enabled. This VF can't be used.",
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dev->data->name);
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return -ENODEV;
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}
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alloc_sw_rings_min_mem(dev, d, num_queues, socket_id);
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/* If minimal memory space approach failed, then allocate
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* the 2 * 64MB block for the sw rings.
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*/
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if (d->sw_rings == NULL)
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alloc_2x64mb_sw_rings_mem(dev, d, socket_id);
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if (d->sw_rings == NULL) {
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rte_bbdev_log(NOTICE,
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"Failure allocating sw_rings memory");
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return -ENOMEM;
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}
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/* Configure ACC200 with the base address for DMA descriptor rings.
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* Same descriptor rings used for UL and DL DMA Engines.
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* Note : Assuming only VF0 bundle is used for PF mode.
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*/
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phys_high = (uint32_t)(d->sw_rings_iova >> 32);
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phys_low = (uint32_t)(d->sw_rings_iova & ~(ACC_SIZE_64MBYTE-1));
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/* Choose correct registry addresses for the device type. */
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if (d->pf_device)
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reg_addr = &pf_reg_addr;
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else
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reg_addr = &vf_reg_addr;
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/* Read the populated cfg from ACC200 registers. */
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fetch_acc200_config(dev);
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/* Start Pmon */
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for (value = 0; value <= 2; value++) {
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acc_reg_write(d, reg_addr->pmon_ctrl_a, value);
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acc_reg_write(d, reg_addr->pmon_ctrl_b, value);
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acc_reg_write(d, reg_addr->pmon_ctrl_c, value);
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}
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/* Release AXI from PF. */
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if (d->pf_device)
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acc_reg_write(d, HWPfDmaAxiControl, 1);
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acc_reg_write(d, reg_addr->dma_ring_ul5g_hi, phys_high);
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acc_reg_write(d, reg_addr->dma_ring_ul5g_lo, phys_low);
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acc_reg_write(d, reg_addr->dma_ring_dl5g_hi, phys_high);
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acc_reg_write(d, reg_addr->dma_ring_dl5g_lo, phys_low);
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acc_reg_write(d, reg_addr->dma_ring_ul4g_hi, phys_high);
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acc_reg_write(d, reg_addr->dma_ring_ul4g_lo, phys_low);
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acc_reg_write(d, reg_addr->dma_ring_dl4g_hi, phys_high);
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acc_reg_write(d, reg_addr->dma_ring_dl4g_lo, phys_low);
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acc_reg_write(d, reg_addr->dma_ring_fft_hi, phys_high);
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acc_reg_write(d, reg_addr->dma_ring_fft_lo, phys_low);
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/*
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* Configure Ring Size to the max queue ring size
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* (used for wrapping purpose).
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*/
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value = log2_basic(d->sw_ring_size / ACC_RING_SIZE_GRANULARITY);
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acc_reg_write(d, reg_addr->ring_size, value);
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/* Configure tail pointer for use when SDONE enabled. */
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if (d->tail_ptrs == NULL)
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d->tail_ptrs = rte_zmalloc_socket(
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dev->device->driver->name,
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ACC200_NUM_QGRPS * ACC200_NUM_AQS * sizeof(uint32_t),
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RTE_CACHE_LINE_SIZE, socket_id);
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if (d->tail_ptrs == NULL) {
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rte_bbdev_log(ERR, "Failed to allocate tail ptr for %s:%u",
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dev->device->driver->name,
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dev->data->dev_id);
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ret = -ENOMEM;
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goto free_sw_rings;
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}
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d->tail_ptr_iova = rte_malloc_virt2iova(d->tail_ptrs);
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phys_high = (uint32_t)(d->tail_ptr_iova >> 32);
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phys_low = (uint32_t)(d->tail_ptr_iova);
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acc_reg_write(d, reg_addr->tail_ptrs_ul5g_hi, phys_high);
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acc_reg_write(d, reg_addr->tail_ptrs_ul5g_lo, phys_low);
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acc_reg_write(d, reg_addr->tail_ptrs_dl5g_hi, phys_high);
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acc_reg_write(d, reg_addr->tail_ptrs_dl5g_lo, phys_low);
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acc_reg_write(d, reg_addr->tail_ptrs_ul4g_hi, phys_high);
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acc_reg_write(d, reg_addr->tail_ptrs_ul4g_lo, phys_low);
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acc_reg_write(d, reg_addr->tail_ptrs_dl4g_hi, phys_high);
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acc_reg_write(d, reg_addr->tail_ptrs_dl4g_lo, phys_low);
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acc_reg_write(d, reg_addr->tail_ptrs_fft_hi, phys_high);
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acc_reg_write(d, reg_addr->tail_ptrs_fft_lo, phys_low);
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if (d->harq_layout == NULL)
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d->harq_layout = rte_zmalloc_socket("HARQ Layout",
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ACC_HARQ_LAYOUT * sizeof(*d->harq_layout),
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RTE_CACHE_LINE_SIZE, dev->data->socket_id);
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if (d->harq_layout == NULL) {
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rte_bbdev_log(ERR, "Failed to allocate harq_layout for %s:%u",
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dev->device->driver->name,
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dev->data->dev_id);
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ret = -ENOMEM;
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goto free_tail_ptrs;
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}
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/* Mark as configured properly */
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d->configured = true;
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rte_bbdev_log_debug(
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"ACC200 (%s) configured sw_rings = %p, sw_rings_iova = %#"
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PRIx64, dev->data->name, d->sw_rings, d->sw_rings_iova);
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return 0;
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free_tail_ptrs:
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rte_free(d->tail_ptrs);
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d->tail_ptrs = NULL;
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free_sw_rings:
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rte_free(d->sw_rings_base);
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d->sw_rings = NULL;
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return ret;
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}
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/* Free memory used for software rings. */
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static int
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acc200_dev_close(struct rte_bbdev *dev)
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{
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RTE_SET_USED(dev);
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struct acc_device *d = dev->data->dev_private;
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if (d->sw_rings_base != NULL) {
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rte_free(d->tail_ptrs);
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rte_free(d->sw_rings_base);
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rte_free(d->harq_layout);
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d->sw_rings_base = NULL;
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d->tail_ptrs = NULL;
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d->harq_layout = NULL;
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}
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/* Ensure all in flight HW transactions are completed. */
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usleep(ACC_LONG_WAIT);
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return 0;
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}
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/**
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* Report a ACC200 queue index which is free.
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* Return 0 to 16k for a valid queue_idx or -1 when no queue is available.
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* Note : Only supporting VF0 Bundle for PF mode.
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*/
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static int
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acc200_find_free_queue_idx(struct rte_bbdev *dev,
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const struct rte_bbdev_queue_conf *conf)
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{
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struct acc_device *d = dev->data->dev_private;
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int op_2_acc[6] = {0, UL_4G, DL_4G, UL_5G, DL_5G, FFT};
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int acc = op_2_acc[conf->op_type];
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struct rte_acc_queue_topology *qtop = NULL;
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uint16_t group_idx;
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uint64_t aq_idx;
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qtopFromAcc(&qtop, acc, &(d->acc_conf));
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if (qtop == NULL)
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return -1;
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/* Identify matching QGroup Index which are sorted in priority order. */
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group_idx = qtop->first_qgroup_index + conf->priority;
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if (group_idx >= ACC200_NUM_QGRPS ||
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conf->priority >= qtop->num_qgroups) {
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rte_bbdev_log(INFO, "Invalid Priority on %s, priority %u",
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dev->data->name, conf->priority);
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return -1;
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}
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/* Find a free AQ_idx. */
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for (aq_idx = 0; aq_idx < qtop->num_aqs_per_groups; aq_idx++) {
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if (((d->q_assigned_bit_map[group_idx] >> aq_idx) & 0x1) == 0) {
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/* Mark the Queue as assigned. */
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d->q_assigned_bit_map[group_idx] |= (1 << aq_idx);
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/* Report the AQ Index. */
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return (group_idx << ACC200_GRP_ID_SHIFT) + aq_idx;
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}
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}
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rte_bbdev_log(INFO, "Failed to find free queue on %s, priority %u",
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dev->data->name, conf->priority);
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return -1;
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}
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/* Setup ACC200 queue. */
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static int
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acc200_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
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const struct rte_bbdev_queue_conf *conf)
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{
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struct acc_device *d = dev->data->dev_private;
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struct acc_queue *q;
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int16_t q_idx;
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int ret;
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if (d == NULL) {
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rte_bbdev_log(ERR, "Undefined device");
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return -ENODEV;
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}
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/* Allocate the queue data structure. */
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q = rte_zmalloc_socket(dev->device->driver->name, sizeof(*q),
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RTE_CACHE_LINE_SIZE, conf->socket);
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if (q == NULL) {
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rte_bbdev_log(ERR, "Failed to allocate queue memory");
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return -ENOMEM;
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}
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q->d = d;
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q->ring_addr = RTE_PTR_ADD(d->sw_rings, (d->sw_ring_size * queue_id));
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q->ring_addr_iova = d->sw_rings_iova + (d->sw_ring_size * queue_id);
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/* Prepare the Ring with default descriptor format. */
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union acc_dma_desc *desc = NULL;
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unsigned int desc_idx, b_idx;
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int fcw_len = (conf->op_type == RTE_BBDEV_OP_LDPC_ENC ?
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ACC_FCW_LE_BLEN : (conf->op_type == RTE_BBDEV_OP_TURBO_DEC ?
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ACC_FCW_TD_BLEN : (conf->op_type == RTE_BBDEV_OP_LDPC_DEC ?
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ACC_FCW_LD_BLEN : ACC_FCW_FFT_BLEN)));
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for (desc_idx = 0; desc_idx < d->sw_ring_max_depth; desc_idx++) {
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desc = q->ring_addr + desc_idx;
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desc->req.word0 = ACC_DMA_DESC_TYPE;
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desc->req.word1 = 0; /**< Timestamp. */
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desc->req.word2 = 0;
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desc->req.word3 = 0;
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uint64_t fcw_offset = (desc_idx << 8) + ACC_DESC_FCW_OFFSET;
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desc->req.data_ptrs[0].address = q->ring_addr_iova + fcw_offset;
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desc->req.data_ptrs[0].blen = fcw_len;
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desc->req.data_ptrs[0].blkid = ACC_DMA_BLKID_FCW;
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desc->req.data_ptrs[0].last = 0;
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desc->req.data_ptrs[0].dma_ext = 0;
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for (b_idx = 1; b_idx < ACC_DMA_MAX_NUM_POINTERS - 1;
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b_idx++) {
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desc->req.data_ptrs[b_idx].blkid = ACC_DMA_BLKID_IN;
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desc->req.data_ptrs[b_idx].last = 1;
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desc->req.data_ptrs[b_idx].dma_ext = 0;
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b_idx++;
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desc->req.data_ptrs[b_idx].blkid =
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ACC_DMA_BLKID_OUT_ENC;
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desc->req.data_ptrs[b_idx].last = 1;
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desc->req.data_ptrs[b_idx].dma_ext = 0;
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}
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/* Preset some fields of LDPC FCW. */
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desc->req.fcw_ld.FCWversion = ACC_FCW_VER;
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desc->req.fcw_ld.gain_i = 1;
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desc->req.fcw_ld.gain_h = 1;
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}
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q->lb_in = rte_zmalloc_socket(dev->device->driver->name,
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RTE_CACHE_LINE_SIZE,
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RTE_CACHE_LINE_SIZE, conf->socket);
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if (q->lb_in == NULL) {
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rte_bbdev_log(ERR, "Failed to allocate lb_in memory");
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ret = -ENOMEM;
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goto free_q;
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}
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q->lb_in_addr_iova = rte_malloc_virt2iova(q->lb_in);
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q->lb_out = rte_zmalloc_socket(dev->device->driver->name,
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RTE_CACHE_LINE_SIZE,
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RTE_CACHE_LINE_SIZE, conf->socket);
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if (q->lb_out == NULL) {
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rte_bbdev_log(ERR, "Failed to allocate lb_out memory");
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ret = -ENOMEM;
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goto free_lb_in;
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}
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q->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);
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q->companion_ring_addr = rte_zmalloc_socket(dev->device->driver->name,
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d->sw_ring_max_depth * sizeof(*q->companion_ring_addr),
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RTE_CACHE_LINE_SIZE, conf->socket);
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if (q->companion_ring_addr == NULL) {
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rte_bbdev_log(ERR, "Failed to allocate companion_ring memory");
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ret = -ENOMEM;
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goto free_lb_out;
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}
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/*
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* Software queue ring wraps synchronously with the HW when it reaches
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* the boundary of the maximum allocated queue size, no matter what the
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* sw queue size is. This wrapping is guarded by setting the wrap_mask
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* to represent the maximum queue size as allocated at the time when
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* the device has been setup (in configure()).
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*
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* The queue depth is set to the queue size value (conf->queue_size).
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* This limits the occupancy of the queue at any point of time, so that
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* the queue does not get swamped with enqueue requests.
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*/
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q->sw_ring_depth = conf->queue_size;
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q->sw_ring_wrap_mask = d->sw_ring_max_depth - 1;
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q->op_type = conf->op_type;
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q_idx = acc200_find_free_queue_idx(dev, conf);
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if (q_idx == -1) {
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ret = -EINVAL;
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goto free_companion_ring_addr;
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}
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q->qgrp_id = (q_idx >> ACC200_GRP_ID_SHIFT) & 0xF;
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q->vf_id = (q_idx >> ACC200_VF_ID_SHIFT) & 0x3F;
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q->aq_id = q_idx & 0xF;
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q->aq_depth = 0;
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if (conf->op_type == RTE_BBDEV_OP_TURBO_DEC)
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q->aq_depth = (1 << d->acc_conf.q_ul_4g.aq_depth_log2);
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else if (conf->op_type == RTE_BBDEV_OP_TURBO_ENC)
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q->aq_depth = (1 << d->acc_conf.q_dl_4g.aq_depth_log2);
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else if (conf->op_type == RTE_BBDEV_OP_LDPC_DEC)
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q->aq_depth = (1 << d->acc_conf.q_ul_5g.aq_depth_log2);
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else if (conf->op_type == RTE_BBDEV_OP_LDPC_ENC)
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q->aq_depth = (1 << d->acc_conf.q_dl_5g.aq_depth_log2);
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else if (conf->op_type == RTE_BBDEV_OP_FFT)
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q->aq_depth = (1 << d->acc_conf.q_fft.aq_depth_log2);
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q->mmio_reg_enqueue = RTE_PTR_ADD(d->mmio_base,
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queue_offset(d->pf_device,
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q->vf_id, q->qgrp_id, q->aq_id));
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rte_bbdev_log_debug(
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"Setup dev%u q%u: qgrp_id=%u, vf_id=%u, aq_id=%u, aq_depth=%u, mmio_reg_enqueue=%p base %p\n",
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dev->data->dev_id, queue_id, q->qgrp_id, q->vf_id,
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q->aq_id, q->aq_depth, q->mmio_reg_enqueue,
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d->mmio_base);
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dev->data->queues[queue_id].queue_private = q;
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return 0;
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free_companion_ring_addr:
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rte_free(q->companion_ring_addr);
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q->companion_ring_addr = NULL;
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free_lb_out:
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rte_free(q->lb_out);
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q->lb_out = NULL;
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free_lb_in:
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rte_free(q->lb_in);
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q->lb_in = NULL;
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free_q:
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rte_free(q);
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q = NULL;
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return ret;
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}
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/* Stop ACC200 queue and clear counters. */
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static int
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acc200_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
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{
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struct acc_queue *q;
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q = dev->data->queues[queue_id].queue_private;
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rte_bbdev_log(INFO, "Queue Stop %d H/T/D %d %d %x OpType %d",
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queue_id, q->sw_ring_head, q->sw_ring_tail,
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q->sw_ring_depth, q->op_type);
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/* ignore all operations in flight and clear counters */
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q->sw_ring_tail = q->sw_ring_head;
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q->aq_enqueued = 0;
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q->aq_dequeued = 0;
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dev->data->queues[queue_id].queue_stats.enqueued_count = 0;
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dev->data->queues[queue_id].queue_stats.dequeued_count = 0;
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||||
dev->data->queues[queue_id].queue_stats.enqueue_err_count = 0;
|
||||
dev->data->queues[queue_id].queue_stats.dequeue_err_count = 0;
|
||||
dev->data->queues[queue_id].queue_stats.enqueue_warn_count = 0;
|
||||
dev->data->queues[queue_id].queue_stats.dequeue_warn_count = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Release ACC200 queue. */
|
||||
static int
|
||||
acc200_queue_release(struct rte_bbdev *dev, uint16_t q_id)
|
||||
{
|
||||
struct acc_device *d = dev->data->dev_private;
|
||||
struct acc_queue *q = dev->data->queues[q_id].queue_private;
|
||||
|
||||
if (q != NULL) {
|
||||
/* Mark the Queue as un-assigned. */
|
||||
d->q_assigned_bit_map[q->qgrp_id] &= (~0ULL - (uint64_t) (1 << q->aq_id));
|
||||
rte_free(q->companion_ring_addr);
|
||||
rte_free(q->lb_in);
|
||||
rte_free(q->lb_out);
|
||||
rte_free(q);
|
||||
dev->data->queues[q_id].queue_private = NULL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Get ACC200 device info. */
|
||||
static void
|
||||
acc200_dev_info_get(struct rte_bbdev *dev,
|
||||
@ -270,8 +655,12 @@ acc200_dev_info_get(struct rte_bbdev *dev,
|
||||
}
|
||||
|
||||
static const struct rte_bbdev_ops acc200_bbdev_ops = {
|
||||
.setup_queues = acc200_setup_queues,
|
||||
.close = acc200_dev_close,
|
||||
.info_get = acc200_dev_info_get,
|
||||
.queue_setup = acc200_queue_setup,
|
||||
.queue_release = acc200_queue_release,
|
||||
.queue_stop = acc200_queue_stop,
|
||||
};
|
||||
|
||||
/* ACC200 PCI PF address map. */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user