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baseband/acc100: enforce additional check on FCW

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Enforce additional check on Frame Control Word validity and
add stronger alignment for decompression mode.

Fixes: 5ad5060f8f ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
This commit is contained in:
Hernan Vargas 2022-10-20 22:20:40 -07:00 committed by Akhil Goyal
parent 4a2f231ee1
commit 5802f36dd4
3 changed files with 62 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/baseband/acc/acc100_pmd.h
View File

@ -87,6 +87,7 @@
#define ACC100_HARQ_DDR (512 * 1)
#define ACC100_PRQ_DDR_VER 0x10092020
#define ACC100_DDR_TRAINING_MAX (5000)
#define ACC100_HARQ_ALIGN_COMP 256
struct acc100_registry_addr {
unsigned int dma_ring_dl5g_hi;

1
drivers/baseband/acc/acc_common.h
View File

@ -120,6 +120,7 @@
#define ACC_ALGO_SPA 0
#define ACC_ALGO_MSA 1
#define ACC_HARQ_ALIGN_64B 64
/* Helper macro for logging */
#define rte_acc_log(level, fmt, ...) \

71
drivers/baseband/acc/rte_acc100_pmd.c
View File

@ -1040,6 +1040,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
uint16_t harq_index;
uint32_t l;
bool harq_prun = false;
uint32_t max_hc_in;
fcw->qm = op->ldpc_dec.q_m;
fcw->nfiller = op->ldpc_dec.n_filler;
@ -1089,13 +1090,22 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
harq_in_length = op->ldpc_dec.harq_combined_input.length;
if (fcw->hcin_decomp_mode > 0)
harq_in_length = harq_in_length * 8 / 6;
harq_in_length = RTE_ALIGN(harq_in_length, 64);
if ((harq_layout[harq_index].offset > 0) & harq_prun) {
harq_in_length = RTE_MIN(harq_in_length, op->ldpc_dec.n_cb
- op->ldpc_dec.n_filler);
/* Alignment on next 64B - Already enforced from HC output */
harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
/* Stronger alignment requirement when in decompression mode */
if (fcw->hcin_decomp_mode > 0)
harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC100_HARQ_ALIGN_COMP);
if ((harq_layout[harq_index].offset > 0) && harq_prun) {
rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
fcw->hcin_size0 = harq_layout[harq_index].size0;
fcw->hcin_offset = harq_layout[harq_index].offset;
fcw->hcin_size1 = harq_in_length -
harq_layout[harq_index].offset;
fcw->hcin_size1 = harq_in_length - harq_layout[harq_index].offset;
} else {
fcw->hcin_size0 = harq_in_length;
fcw->hcin_offset = 0;
@ -1107,6 +1117,21 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
fcw->hcin_size1 = 0;
}
/* Enforce additional check on FCW validity */
max_hc_in = RTE_ALIGN_CEIL(fcw->ncb - fcw->nfiller, ACC_HARQ_ALIGN_64B);
if ((fcw->hcin_size0 > max_hc_in) ||
(fcw->hcin_size1 + fcw->hcin_offset > max_hc_in) ||
((fcw->hcin_size0 > fcw->hcin_offset) &&
(fcw->hcin_size1 != 0))) {
rte_bbdev_log(ERR, " Invalid FCW : HCIn %d %d %d, Ncb %d F %d",
fcw->hcin_size0, fcw->hcin_size1,
fcw->hcin_offset,
fcw->ncb, fcw->nfiller);
/* Disable HARQ input in that case to carry forward */
op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
fcw->hcin_en = 0;
}
fcw->itmax = op->ldpc_dec.iter_max;
fcw->itstop = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE);
@ -1131,15 +1156,27 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
if (fcw->hcout_en > 0) {
parity_offset = (op->ldpc_dec.basegraph == 1 ? 20 : 8)
* op->ldpc_dec.z_c - op->ldpc_dec.n_filler;
k0_p = (fcw->k0 > parity_offset) ?
fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
k0_p = (fcw->k0 > parity_offset) ? fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
ncb_p = fcw->ncb - op->ldpc_dec.n_filler;
l = k0_p + fcw->rm_e;
l = RTE_MIN(k0_p + fcw->rm_e, INT16_MAX);
harq_out_length = (uint16_t) fcw->hcin_size0;
harq_out_length = RTE_MIN(RTE_MAX(harq_out_length, l), ncb_p);
harq_out_length = (harq_out_length + 0x3F) & 0xFFC0;
if ((k0_p > fcw->hcin_size0 + ACC_HARQ_OFFSET_THRESHOLD) &&
harq_prun) {
harq_out_length = RTE_MAX(harq_out_length, l);
/* Stronger alignment when in compression mode */
if (fcw->hcout_comp_mode > 0)
harq_out_length = RTE_ALIGN_CEIL(harq_out_length, ACC100_HARQ_ALIGN_COMP);
/* Cannot exceed the pruned Ncb circular buffer */
harq_out_length = RTE_MIN(harq_out_length, ncb_p);
/* Alignment on next 64B */
harq_out_length = RTE_ALIGN_CEIL(harq_out_length, ACC_HARQ_ALIGN_64B);
/* Stronger alignment when in compression mode enforced again */
if (fcw->hcout_comp_mode > 0)
harq_out_length = RTE_ALIGN_FLOOR(harq_out_length, ACC100_HARQ_ALIGN_COMP);
if ((k0_p > fcw->hcin_size0 + ACC_HARQ_OFFSET_THRESHOLD) && harq_prun) {
fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
fcw->hcout_offset = k0_p & 0xFFC0;
fcw->hcout_size1 = harq_out_length - fcw->hcout_offset;
@ -1148,6 +1185,14 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
fcw->hcout_size1 = 0;
fcw->hcout_offset = 0;
}
if (fcw->hcout_size0 == 0) {
rte_bbdev_log(ERR, " Invalid FCW : HCout %d",
fcw->hcout_size0);
op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE;
fcw->hcout_en = 0;
}
harq_layout[harq_index].offset = fcw->hcout_offset;
harq_layout[harq_index].size0 = fcw->hcout_size0;
} else {
@ -1188,6 +1233,10 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
/* Disable HARQ input in that case to carry forward */
op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
}
if (unlikely(fcw->rm_e == 0)) {
rte_bbdev_log(WARNING, "Null E input provided");
fcw->rm_e = 2;
}
fcw->hcin_en = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);