ixgbe/base: improve error handling

Signed-off-by: Jijiang Liu <jijiang.liu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Waterman Cao <waterman.cao@intel.com>
[Thomas: split code drop]
This commit is contained in:
Jijiang Liu 2014-06-18 17:15:39 +02:00 committed by Thomas Monjalon
parent 3211b57388
commit 9ba80bde4c
8 changed files with 268 additions and 97 deletions

View File

@ -2193,22 +2193,37 @@ STATIC s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
}
/* get the offset to the Firmware Module block */
hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset);
if (hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset)) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed", IXGBE_FW_PTR);
return IXGBE_ERR_EEPROM_VERSION;
}
if ((fw_offset == 0) || (fw_offset == 0xFFFF))
goto fw_version_out;
/* get the offset to the Pass Through Patch Configuration block */
hw->eeprom.ops.read(hw, (fw_offset +
if (hw->eeprom.ops.read(hw, (fw_offset +
IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR),
&fw_ptp_cfg_offset);
&fw_ptp_cfg_offset)) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed",
fw_offset +
IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR);
return IXGBE_ERR_EEPROM_VERSION;
}
if ((fw_ptp_cfg_offset == 0) || (fw_ptp_cfg_offset == 0xFFFF))
goto fw_version_out;
/* get the firmware version */
hw->eeprom.ops.read(hw, (fw_ptp_cfg_offset +
IXGBE_FW_PATCH_VERSION_4), &fw_version);
if (hw->eeprom.ops.read(hw, (fw_ptp_cfg_offset +
IXGBE_FW_PATCH_VERSION_4), &fw_version)) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed",
fw_ptp_cfg_offset + IXGBE_FW_PATCH_VERSION_4);
return IXGBE_ERR_EEPROM_VERSION;
}
if (fw_version > 0x5)
status = IXGBE_SUCCESS;

View File

@ -93,6 +93,12 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
DEBUGFUNC("ixgbe_set_mac_type\n");
if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
"Unsupported vendor id: %x", hw->vendor_id);
return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
}
switch (hw->device_id) {
case IXGBE_DEV_ID_82598:
case IXGBE_DEV_ID_82598_BX:
@ -138,6 +144,9 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
break;
default:
ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
"Unsupported device id: %x",
hw->device_id);
break;
}

View File

@ -182,7 +182,8 @@ STATIC s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
* ixgbe_fc_rx_pause because it will cause us to fail at UNH.
*/
if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {
DEBUGOUT("ixgbe_fc_rx_pause not valid in strict IEEE mode\n");
ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED,
"ixgbe_fc_rx_pause not valid in strict IEEE mode\n");
ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
goto out;
}
@ -268,13 +269,14 @@ STATIC s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
reg_cu |= IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE;
break;
default:
DEBUGOUT("Flow control param set incorrectly\n");
ERROR_REPORT1(IXGBE_ERROR_ARGUMENT,
"Flow control param set incorrectly\n");
ret_val = IXGBE_ERR_CONFIG;
goto out;
break;
}
if (hw->mac.type != ixgbe_mac_X540) {
if (hw->mac.type < ixgbe_mac_X540) {
/*
* Enable auto-negotiation between the MAC & PHY;
* the MAC will advertise clause 37 flow control.
@ -325,7 +327,7 @@ STATIC s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg_cu);
}
DEBUGOUT1("Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);
DEBUGOUT1("Set up FC; PCS1GLCTL = 0x%08X\n", reg);
out:
return ret_val;
}
@ -1469,16 +1471,18 @@ s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
if (words == 0) {
status = IXGBE_ERR_INVALID_ARGUMENT;
ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM words");
goto out;
}
if (offset >= hw->eeprom.word_size) {
status = IXGBE_ERR_EEPROM;
ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM offset");
goto out;
}
for (i = 0; i < words; i++) {
eerd = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) +
eerd = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) |
IXGBE_EEPROM_RW_REG_START;
IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd);
@ -1575,11 +1579,13 @@ s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
if (words == 0) {
status = IXGBE_ERR_INVALID_ARGUMENT;
ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM words");
goto out;
}
if (offset >= hw->eeprom.word_size) {
status = IXGBE_ERR_EEPROM;
ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM offset");
goto out;
}
@ -1648,6 +1654,11 @@ s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)
}
usec_delay(5);
}
if (i == IXGBE_EERD_EEWR_ATTEMPTS)
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"EEPROM read/write done polling timed out");
return status;
}
@ -1783,14 +1794,15 @@ STATIC s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw)
* was not granted because we don't have access to the EEPROM
*/
if (i >= timeout) {
DEBUGOUT("SWESMBI Software EEPROM semaphore "
"not granted.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"SWESMBI Software EEPROM semaphore not granted.\n");
ixgbe_release_eeprom_semaphore(hw);
status = IXGBE_ERR_EEPROM;
}
} else {
DEBUGOUT("Software semaphore SMBI between device drivers "
"not granted.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Software semaphore SMBI between device drivers "
"not granted.\n");
}
return status;
@ -2214,7 +2226,8 @@ s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
/* Make sure we are using a valid rar index range */
if (index >= rar_entries) {
DEBUGOUT1("RAR index %d is out of range.\n", index);
ERROR_REPORT2(IXGBE_ERROR_ARGUMENT,
"RAR index %d is out of range.\n", index);
return IXGBE_ERR_INVALID_ARGUMENT;
}
@ -2263,7 +2276,8 @@ s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)
/* Make sure we are using a valid rar index range */
if (index >= rar_entries) {
DEBUGOUT1("RAR index %d is out of range.\n", index);
ERROR_REPORT2(IXGBE_ERROR_ARGUMENT,
"RAR index %d is out of range.\n", index);
return IXGBE_ERR_INVALID_ARGUMENT;
}
@ -2706,7 +2720,8 @@ s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw)
fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X;
break;
default:
DEBUGOUT("Flow control param set incorrectly\n");
ERROR_REPORT1(IXGBE_ERROR_ARGUMENT,
"Flow control param set incorrectly\n");
ret_val = IXGBE_ERR_CONFIG;
goto out;
break;
@ -2767,8 +2782,13 @@ out:
STATIC s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
{
if ((!(adv_reg)) || (!(lp_reg)))
if ((!(adv_reg)) || (!(lp_reg))) {
ERROR_REPORT3(IXGBE_ERROR_UNSUPPORTED,
"Local or link partner's advertised flow control "
"settings are NULL. Local: %x, link partner: %x\n",
adv_reg, lp_reg);
return IXGBE_ERR_FC_NOT_NEGOTIATED;
}
if ((adv_reg & adv_sym) && (lp_reg & lp_sym)) {
/*
@ -2819,8 +2839,11 @@ STATIC s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw)
linkstat = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
if ((!!(linkstat & IXGBE_PCS1GLSTA_AN_COMPLETE) == 0) ||
(!!(linkstat & IXGBE_PCS1GLSTA_AN_TIMED_OUT) == 1))
(!!(linkstat & IXGBE_PCS1GLSTA_AN_TIMED_OUT) == 1)) {
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Auto-Negotiation did not complete or timed out");
goto out;
}
pcs_anadv_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
pcs_lpab_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
@ -2852,13 +2875,19 @@ STATIC s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw)
* - we are 82599 and link partner is not AN enabled
*/
links = IXGBE_READ_REG(hw, IXGBE_LINKS);
if ((links & IXGBE_LINKS_KX_AN_COMP) == 0)
if ((links & IXGBE_LINKS_KX_AN_COMP) == 0) {
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Auto-Negotiation did not complete");
goto out;
}
if (hw->mac.type == ixgbe_mac_82599EB) {
links2 = IXGBE_READ_REG(hw, IXGBE_LINKS2);
if ((links2 & IXGBE_LINKS2_AN_SUPPORTED) == 0)
if ((links2 & IXGBE_LINKS2_AN_SUPPORTED) == 0) {
ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED,
"Link partner is not AN enabled");
goto out;
}
}
/*
* Read the 10g AN autoc and LP ability registers and resolve
@ -2920,12 +2949,17 @@ void ixgbe_fc_autoneg(struct ixgbe_hw *hw)
* - FC autoneg is disabled, or if
* - link is not up.
*/
if (hw->fc.disable_fc_autoneg)
if (hw->fc.disable_fc_autoneg) {
ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED,
"Flow control autoneg is disabled");
goto out;
}
hw->mac.ops.check_link(hw, &speed, &link_up, false);
if (!link_up)
if (!link_up) {
ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down");
goto out;
}
switch (hw->phy.media_type) {
/* Autoneg flow control on fiber adapters */
@ -3010,7 +3044,8 @@ s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)
goto out;
}
DEBUGOUT("PCIe transaction pending bit also did not clear.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"PCIe transaction pending bit also did not clear.\n");
status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
out:
@ -3281,15 +3316,23 @@ out:
STATIC s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw,
u16 *san_mac_offset)
{
s32 ret_val;
DEBUGFUNC("ixgbe_get_san_mac_addr_offset");
/*
* First read the EEPROM pointer to see if the MAC addresses are
* available.
*/
hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, san_mac_offset);
ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR,
san_mac_offset);
if (ret_val) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom at offset %d failed",
IXGBE_SAN_MAC_ADDR_PTR);
}
return IXGBE_SUCCESS;
return ret_val;
}
/**
@ -3306,6 +3349,7 @@ s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
{
u16 san_mac_data, san_mac_offset;
u8 i;
s32 ret_val;
DEBUGFUNC("ixgbe_get_san_mac_addr_generic");
@ -3313,18 +3357,9 @@ s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
* First read the EEPROM pointer to see if the MAC addresses are
* available. If they're not, no point in calling set_lan_id() here.
*/
ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset);
if ((san_mac_offset == 0) || (san_mac_offset == 0xFFFF)) {
/*
* No addresses available in this EEPROM. It's not an
* error though, so just wipe the local address and return.
*/
for (i = 0; i < 6; i++)
san_mac_addr[i] = 0xFF;
ret_val = ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset);
if (ret_val || san_mac_offset == 0 || san_mac_offset == 0xFFFF)
goto san_mac_addr_out;
}
/* make sure we know which port we need to program */
hw->mac.ops.set_lan_id(hw);
@ -3332,13 +3367,27 @@ s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
(hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) :
(san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT0_OFFSET);
for (i = 0; i < 3; i++) {
hw->eeprom.ops.read(hw, san_mac_offset, &san_mac_data);
ret_val = hw->eeprom.ops.read(hw, san_mac_offset,
&san_mac_data);
if (ret_val) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed",
san_mac_offset);
goto san_mac_addr_out;
}
san_mac_addr[i * 2] = (u8)(san_mac_data);
san_mac_addr[i * 2 + 1] = (u8)(san_mac_data >> 8);
san_mac_offset++;
}
return IXGBE_SUCCESS;
san_mac_addr_out:
/*
* No addresses available in this EEPROM. It's not an
* error though, so just wipe the local address and return.
*/
for (i = 0; i < 6; i++)
san_mac_addr[i] = 0xFF;
return IXGBE_SUCCESS;
}
@ -3351,19 +3400,16 @@ san_mac_addr_out:
**/
s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
{
s32 status = IXGBE_SUCCESS;
s32 ret_val;
u16 san_mac_data, san_mac_offset;
u8 i;
DEBUGFUNC("ixgbe_set_san_mac_addr_generic");
/* Look for SAN mac address pointer. If not defined, return */
ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset);
if ((san_mac_offset == 0) || (san_mac_offset == 0xFFFF)) {
status = IXGBE_ERR_NO_SAN_ADDR_PTR;
goto san_mac_addr_out;
}
ret_val = ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset);
if (ret_val || san_mac_offset == 0 || san_mac_offset == 0xFFFF)
return IXGBE_ERR_NO_SAN_ADDR_PTR;
/* Make sure we know which port we need to write */
hw->mac.ops.set_lan_id(hw);
@ -3378,8 +3424,7 @@ s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
san_mac_offset++;
}
san_mac_addr_out:
return status;
return IXGBE_SUCCESS;
}
/**
@ -3506,7 +3551,8 @@ s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
/* Make sure we are using a valid rar index range */
if (rar >= rar_entries) {
DEBUGOUT1("RAR index %d is out of range.\n", rar);
ERROR_REPORT2(IXGBE_ERROR_ARGUMENT,
"RAR index %d is out of range.\n", rar);
return IXGBE_ERR_INVALID_ARGUMENT;
}
@ -3555,7 +3601,8 @@ s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
/* Make sure we are using a valid rar index range */
if (rar >= rar_entries) {
DEBUGOUT1("RAR index %d is out of range.\n", rar);
ERROR_REPORT2(IXGBE_ERROR_ARGUMENT,
"RAR index %d is out of range.\n", rar);
return IXGBE_ERR_INVALID_ARGUMENT;
}
@ -3654,7 +3701,8 @@ s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan)
if (first_empty_slot)
regindex = first_empty_slot;
else {
DEBUGOUT("No space in VLVF.\n");
ERROR_REPORT1(IXGBE_ERROR_SOFTWARE,
"No space in VLVF.\n");
regindex = IXGBE_ERR_NO_SPACE;
}
}
@ -3944,8 +3992,9 @@ s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
*wwpn_prefix = 0xFFFF;
/* check if alternative SAN MAC is supported */
hw->eeprom.ops.read(hw, IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR,
&alt_san_mac_blk_offset);
offset = IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR;
if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset))
goto wwn_prefix_err;
if ((alt_san_mac_blk_offset == 0) ||
(alt_san_mac_blk_offset == 0xFFFF))
@ -3953,19 +4002,29 @@ s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
/* check capability in alternative san mac address block */
offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET;
hw->eeprom.ops.read(hw, offset, &caps);
if (hw->eeprom.ops.read(hw, offset, &caps))
goto wwn_prefix_err;
if (!(caps & IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN))
goto wwn_prefix_out;
/* get the corresponding prefix for WWNN/WWPN */
offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET;
hw->eeprom.ops.read(hw, offset, wwnn_prefix);
if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed", offset);
}
offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET;
hw->eeprom.ops.read(hw, offset, wwpn_prefix);
if (hw->eeprom.ops.read(hw, offset, wwpn_prefix))
goto wwn_prefix_err;
wwn_prefix_out:
return IXGBE_SUCCESS;
wwn_prefix_err:
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed", offset);
return IXGBE_SUCCESS;
}
/**

View File

@ -76,10 +76,11 @@ s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
DEBUGFUNC("ixgbe_write_mbx");
if (size > mbx->size)
if (size > mbx->size) {
ret_val = IXGBE_ERR_MBX;
else if (mbx->ops.write)
ERROR_REPORT2(IXGBE_ERROR_ARGUMENT,
"Invalid mailbox message size %d", size);
} else if (mbx->ops.write)
ret_val = mbx->ops.write(hw, msg, size, mbx_id);
return ret_val;
@ -169,6 +170,10 @@ STATIC s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
usec_delay(mbx->usec_delay);
}
if (countdown == 0)
ERROR_REPORT2(IXGBE_ERROR_POLLING,
"Polling for VF%d mailbox message timedout", mbx_id);
out:
return countdown ? IXGBE_SUCCESS : IXGBE_ERR_MBX;
}
@ -197,6 +202,10 @@ STATIC s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
usec_delay(mbx->usec_delay);
}
if (countdown == 0)
ERROR_REPORT2(IXGBE_ERROR_POLLING,
"Polling for VF%d mailbox ack timedout", mbx_id);
out:
return countdown ? IXGBE_SUCCESS : IXGBE_ERR_MBX;
}
@ -643,6 +652,10 @@ STATIC s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
if (p2v_mailbox & IXGBE_PFMAILBOX_PFU)
ret_val = IXGBE_SUCCESS;
else
ERROR_REPORT2(IXGBE_ERROR_POLLING,
"Failed to obtain mailbox lock for VF%d", vf_number);
return ret_val;
}

View File

@ -62,6 +62,10 @@
#define DEBUGOUT6(S, args...) DEBUGOUT(S, ##args)
#define DEBUGOUT7(S, args...) DEBUGOUT(S, ##args)
#define ERROR_REPORT1(e, S, args...) DEBUGOUT(S, ##args)
#define ERROR_REPORT2 DEBUGOUT2
#define ERROR_REPORT3 DEBUGOUT3
#define FALSE 0
#define TRUE 1

View File

@ -267,7 +267,8 @@ s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw)
if (ctrl & IXGBE_MDIO_PHY_XS_RESET) {
status = IXGBE_ERR_RESET_FAILED;
DEBUGOUT("PHY reset polling failed to complete.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"PHY reset polling failed to complete.\n");
}
out:
@ -558,7 +559,8 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
if (time_out == max_time_out) {
status = IXGBE_ERR_LINK_SETUP;
DEBUGOUT("ixgbe_setup_phy_link_generic: time out");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"PHY autonegotiation time out");
}
return status;
@ -867,6 +869,8 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
* Read control word from PHY init contents offset
*/
ret_val = hw->eeprom.ops.read(hw, data_offset, &eword);
if (ret_val)
goto err_eeprom;
control = (eword & IXGBE_CONTROL_MASK_NL) >>
IXGBE_CONTROL_SHIFT_NL;
edata = eword & IXGBE_DATA_MASK_NL;
@ -879,10 +883,16 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
case IXGBE_DATA_NL:
DEBUGOUT("DATA:\n");
data_offset++;
hw->eeprom.ops.read(hw, data_offset++,
&phy_offset);
ret_val = hw->eeprom.ops.read(hw, data_offset,
&phy_offset);
if (ret_val)
goto err_eeprom;
data_offset++;
for (i = 0; i < edata; i++) {
hw->eeprom.ops.read(hw, data_offset, &eword);
ret_val = hw->eeprom.ops.read(hw, data_offset,
&eword);
if (ret_val)
goto err_eeprom;
hw->phy.ops.write_reg(hw, phy_offset,
IXGBE_TWINAX_DEV, eword);
DEBUGOUT2("Wrote %4.4x to %4.4x\n", eword,
@ -914,6 +924,11 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
out:
return ret_val;
err_eeprom:
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed", data_offset);
return IXGBE_ERR_PHY;
}
/**
@ -974,9 +989,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
IXGBE_SFF_IDENTIFIER,
&identifier);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
/* LAN ID is needed for sfp_type determination */
@ -990,26 +1003,20 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
IXGBE_SFF_1GBE_COMP_CODES,
&comp_codes_1g);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
status = hw->phy.ops.read_i2c_eeprom(hw,
IXGBE_SFF_10GBE_COMP_CODES,
&comp_codes_10g);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
status = hw->phy.ops.read_i2c_eeprom(hw,
IXGBE_SFF_CABLE_TECHNOLOGY,
&cable_tech);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
/* ID Module
@ -1107,27 +1114,21 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
IXGBE_SFF_VENDOR_OUI_BYTE0,
&oui_bytes[0]);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
status = hw->phy.ops.read_i2c_eeprom(hw,
IXGBE_SFF_VENDOR_OUI_BYTE1,
&oui_bytes[1]);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
status = hw->phy.ops.read_i2c_eeprom(hw,
IXGBE_SFF_VENDOR_OUI_BYTE2,
&oui_bytes[2]);
if (status == IXGBE_ERR_SWFW_SYNC ||
status == IXGBE_ERR_I2C ||
status == IXGBE_ERR_SFP_NOT_PRESENT)
if (status != IXGBE_SUCCESS)
goto err_read_i2c_eeprom;
vendor_oui =
@ -1280,7 +1281,12 @@ s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
sfp_type = ixgbe_sfp_type_srlr_core1;
/* Read offset to PHY init contents */
hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset);
if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) {
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed",
IXGBE_PHY_INIT_OFFSET_NL);
return IXGBE_ERR_SFP_NO_INIT_SEQ_PRESENT;
}
if ((!*list_offset) || (*list_offset == 0xFFFF))
return IXGBE_ERR_SFP_NO_INIT_SEQ_PRESENT;
@ -1292,12 +1298,14 @@ s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
* Find the matching SFP ID in the EEPROM
* and program the init sequence
*/
hw->eeprom.ops.read(hw, *list_offset, &sfp_id);
if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id))
goto err_phy;
while (sfp_id != IXGBE_PHY_INIT_END_NL) {
if (sfp_id == sfp_type) {
(*list_offset)++;
hw->eeprom.ops.read(hw, *list_offset, data_offset);
if (hw->eeprom.ops.read(hw, *list_offset, data_offset))
goto err_phy;
if ((!*data_offset) || (*data_offset == 0xFFFF)) {
DEBUGOUT("SFP+ module not supported\n");
return IXGBE_ERR_SFP_NOT_SUPPORTED;
@ -1307,7 +1315,7 @@ s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
} else {
(*list_offset) += 2;
if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id))
return IXGBE_ERR_PHY;
goto err_phy;
}
}
@ -1317,6 +1325,11 @@ s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
}
return IXGBE_SUCCESS;
err_phy:
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"eeprom read at offset %d failed", *list_offset);
return IXGBE_ERR_PHY;
}
/**
@ -1666,7 +1679,8 @@ STATIC s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
}
if (ack == 1) {
DEBUGOUT("I2C ack was not received.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"I2C ack was not received.\n");
status = IXGBE_ERR_I2C;
}
@ -1736,7 +1750,8 @@ STATIC s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)
usec_delay(IXGBE_I2C_T_LOW);
} else {
status = IXGBE_ERR_I2C;
DEBUGOUT1("I2C data was not set to %X\n", data);
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"I2C data was not set to %X\n", data);
}
return status;
@ -1820,7 +1835,9 @@ STATIC s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
*i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
if (data != ixgbe_get_i2c_data(i2cctl)) {
status = IXGBE_ERR_I2C;
DEBUGOUT1("Error - I2C data was not set to %X.\n", data);
ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE,
"Error - I2C data was not set to %X.\n",
data);
}
return status;
@ -1907,6 +1924,7 @@ s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw)
goto out;
status = IXGBE_ERR_OVERTEMP;
ERROR_REPORT1(IXGBE_ERROR_CAUTION, "Device over temperature");
out:
return status;
}

View File

@ -34,10 +34,51 @@ POSSIBILITY OF SUCH DAMAGE.
#ifndef _IXGBE_TYPE_H_
#define _IXGBE_TYPE_H_
/*
* The following is a brief description of the error categories used by the
* ERROR_REPORT* macros.
*
* - IXGBE_ERROR_INVALID_STATE
* This category is for errors which represent a serious failure state that is
* unexpected, and could be potentially harmful to device operation. It should
* not be used for errors relating to issues that can be worked around or
* ignored.
*
* - IXGBE_ERROR_POLLING
* This category is for errors related to polling/timeout issues and should be
* used in any case where the timeout occured, or a failure to obtain a lock, or
* failure to receive data within the time limit.
*
* - IXGBE_ERROR_CAUTION
* This category should be used for reporting issues that may be the cause of
* other errors, such as temperature warnings. It should indicate an event which
* could be serious, but hasn't necessarily caused problems yet.
*
* - IXGBE_ERROR_SOFTWARE
* This category is intended for errors due to software state preventing
* something. The category is not intended for errors due to bad arguments, or
* due to unsupported features. It should be used when a state occurs which
* prevents action but is not a serious issue.
*
* - IXGBE_ERROR_ARGUMENT
* This category is for when a bad or invalid argument is passed. It should be
* used whenever a function is called and error checking has detected the
* argument is wrong or incorrect.
*
* - IXGBE_ERROR_UNSUPPORTED
* This category is for errors which are due to unsupported circumstances or
* configuration issues. It should not be used when the issue is due to an
* invalid argument, but for when something has occurred that is unsupported
* (Ex: Flow control autonegotiation or an unsupported SFP+ module.)
*/
#include "ixgbe_osdep.h"
#ident "$Id: ixgbe_type.h,v 1.552 2012/11/08 11:33:27 jtkirshe Exp $"
/* Vendor ID */
#define IXGBE_INTEL_VENDOR_ID 0x8086
/* Device IDs */
#define IXGBE_DEV_ID_82598 0x10B6
#define IXGBE_DEV_ID_82598_BX 0x1508

View File

@ -227,7 +227,8 @@ mac_reset_top:
if (ctrl & IXGBE_CTRL_RST_MASK) {
status = IXGBE_ERR_RESET_FAILED;
DEBUGOUT("Reset polling failed to complete.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Reset polling failed to complete.\n");
}
msec_delay(100);
@ -579,8 +580,11 @@ s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw,
* Verify read checksum from EEPROM is the same as
* calculated checksum
*/
if (read_checksum != checksum)
if (read_checksum != checksum) {
status = IXGBE_ERR_EEPROM_CHECKSUM;
ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE,
"Invalid EEPROM checksum");
}
/* If the user cares, return the calculated checksum */
if (checksum_val)
@ -711,6 +715,11 @@ STATIC s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw)
}
usec_delay(5);
}
if (i == IXGBE_FLUDONE_ATTEMPTS)
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Flash update status polling timed out");
return status;
}
@ -772,6 +781,8 @@ s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask)
/* Failed to get SW only semaphore */
if (swmask == IXGBE_GSSR_SW_MNG_SM) {
ret_val = IXGBE_ERR_SWFW_SYNC;
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Failed to get SW only semaphore");
goto out;
}
@ -866,14 +877,15 @@ STATIC s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)
* was not granted because we don't have access to the EEPROM
*/
if (i >= timeout) {
DEBUGOUT("REGSMP Software NVM semaphore not "
"granted.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"REGSMP Software NVM semaphore not granted.\n");
ixgbe_release_swfw_sync_semaphore(hw);
status = IXGBE_ERR_EEPROM;
}
} else {
DEBUGOUT("Software semaphore SMBI between device drivers "
"not granted.\n");
ERROR_REPORT1(IXGBE_ERROR_POLLING,
"Software semaphore SMBI between device drivers "
"not granted.\n");
}
return status;