dma/dpaa2: support DMA operations
This patch support copy, submit, completed and completed status functionality of DMA driver. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This commit is contained in:
Nipun Gupta
Thomas Monjalon
parent
97f9032f5a
commit
9e2f8ca6c2
@ -12,6 +12,16 @@ via using the DPDMAI device exposed by MC.
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More information can be found at `NXP Official Website
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<http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-arm-processors:QORIQ-ARM>`_.
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Features
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--------
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The DPAA2 QDMA implements following features in the dmadev API;
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- Supports issuing DMA of data within memory without hogging CPU while
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performing DMA operation.
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- Supports configuring to optionally get status of the DMA translation on
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per DMA operation basis.
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Supported DPAA2 SoCs
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--------------------
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File diff suppressed because it is too large
Load Diff
@ -80,65 +80,6 @@
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#define QDMA_RBP_UPPER_ADDRESS_MASK (0xfff0000000000)
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/** Determines a QDMA job */
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struct dpaa2_qdma_job {
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/** Source Address from where DMA is (to be) performed */
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uint64_t src;
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/** Destination Address where DMA is (to be) done */
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uint64_t dest;
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/** Length of the DMA operation in bytes. */
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uint32_t len;
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/** See RTE_QDMA_JOB_ flags */
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uint32_t flags;
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/**
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* Status of the transaction.
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* This is filled in the dequeue operation by the driver.
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* upper 8bits acc_err for route by port.
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* lower 8bits fd error
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*/
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uint16_t status;
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uint16_t vq_id;
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/**
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* FLE pool element maintained by user, in case no qDMA response.
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* Note: the address must be allocated from DPDK memory pool.
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*/
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void *usr_elem;
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};
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struct dpaa2_qdma_rbp {
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uint32_t use_ultrashort:1;
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uint32_t enable:1;
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/**
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* dportid:
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* 0000 PCI-Express 1
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* 0001 PCI-Express 2
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* 0010 PCI-Express 3
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* 0011 PCI-Express 4
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* 0100 PCI-Express 5
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* 0101 PCI-Express 6
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*/
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uint32_t dportid:4;
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uint32_t dpfid:2;
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uint32_t dvfid:6;
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/*using route by port for destination */
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uint32_t drbp:1;
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/**
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* sportid:
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* 0000 PCI-Express 1
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* 0001 PCI-Express 2
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* 0010 PCI-Express 3
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* 0011 PCI-Express 4
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* 0100 PCI-Express 5
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* 0101 PCI-Express 6
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*/
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uint32_t sportid:4;
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uint32_t spfid:2;
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uint32_t svfid:6;
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/* using route by port for source */
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uint32_t srbp:1;
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uint32_t rsv:4;
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};
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/** Source/Destination Descriptor */
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struct qdma_sdd {
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uint32_t rsv;
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@ -248,22 +189,22 @@ struct qdma_virt_queue;
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typedef uint16_t (qdma_get_job_t)(struct qdma_virt_queue *qdma_vq,
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const struct qbman_fd *fd,
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struct dpaa2_qdma_job **job,
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struct rte_dpaa2_qdma_job **job,
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uint16_t *nb_jobs);
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typedef int (qdma_set_fd_t)(struct qdma_virt_queue *qdma_vq,
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struct qbman_fd *fd,
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struct dpaa2_qdma_job **job,
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struct rte_dpaa2_qdma_job **job,
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uint16_t nb_jobs);
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typedef int (qdma_dequeue_multijob_t)(
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struct qdma_virt_queue *qdma_vq,
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uint16_t *vq_id,
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struct dpaa2_qdma_job **job,
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struct rte_dpaa2_qdma_job **job,
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uint16_t nb_jobs);
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typedef int (qdma_enqueue_multijob_t)(
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struct qdma_virt_queue *qdma_vq,
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struct dpaa2_qdma_job **job,
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struct rte_dpaa2_qdma_job **job,
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uint16_t nb_jobs);
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/** Represents a QDMA virtual queue */
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@ -275,7 +216,7 @@ struct qdma_virt_queue {
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/** FLE pool for the queue */
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struct rte_mempool *fle_pool;
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/** Route by port */
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struct dpaa2_qdma_rbp rbp;
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struct rte_dpaa2_qdma_rbp rbp;
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/** States if this vq is in use or not */
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uint8_t in_use;
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/** States if this vq has exclusively associated hw queue */
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@ -290,7 +231,7 @@ struct qdma_virt_queue {
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uint16_t vq_id;
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uint32_t flags;
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struct dpaa2_qdma_job *job_list[DPAA2_QDMA_MAX_DESC];
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struct rte_dpaa2_qdma_job *job_list[DPAA2_QDMA_MAX_DESC];
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struct rte_mempool *job_pool;
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int num_valid_jobs;
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@ -45,6 +45,31 @@ struct rte_dpaa2_qdma_rbp {
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uint32_t rsv:4;
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};
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/** Determines a QDMA job */
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struct rte_dpaa2_qdma_job {
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/** Source Address from where DMA is (to be) performed */
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uint64_t src;
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/** Destination Address where DMA is (to be) done */
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uint64_t dest;
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/** Length of the DMA operation in bytes. */
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uint32_t len;
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/** See RTE_QDMA_JOB_ flags */
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uint32_t flags;
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/**
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* Status of the transaction.
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* This is filled in the dequeue operation by the driver.
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* upper 8bits acc_err for route by port.
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* lower 8bits fd error
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*/
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uint16_t status;
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uint16_t vq_id;
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/**
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* FLE pool element maintained by user, in case no qDMA response.
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* Note: the address must be allocated from DPDK memory pool.
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*/
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void *usr_elem;
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};
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/**
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice.
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@ -93,4 +118,56 @@ __rte_experimental
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void rte_dpaa2_qdma_vchan_rbp_enable(int16_t dev_id, uint16_t vchan,
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struct rte_dpaa2_qdma_rbp *rbp_config);
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/**
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice.
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*
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* Enqueue a copy operation onto the virtual DMA channel for silent mode,
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* when dequeue is not required.
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*
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* This queues up a copy operation to be performed by hardware, if the 'flags'
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* parameter contains RTE_DMA_OP_FLAG_SUBMIT then trigger doorbell to begin
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* this operation, otherwise do not trigger doorbell.
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*
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* @param dev_id
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* The identifier of the device.
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* @param vchan
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* The identifier of virtual DMA channel.
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* @param jobs
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* Jobs to be submitted to QDMA.
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* @param nb_cpls
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* Number of DMA jobs.
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*
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* @return
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* - >= 0..Number of enqueued job.
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* - -ENOSPC: if no space left to enqueue.
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* - other values < 0 on failure.
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*/
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__rte_experimental
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int rte_dpaa2_qdma_copy_multi(int16_t dev_id, uint16_t vchan,
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struct rte_dpaa2_qdma_job **jobs, uint16_t nb_cpls);
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/**
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice.
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*
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* Return the number of operations that have been successfully completed.
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*
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* @param dev_id
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* The identifier of the device.
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* @param vchan
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* The identifier of virtual DMA channel.
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* @param jobs
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* Jobs completed by QDMA.
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* @param nb_cpls
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* Number of completed DMA jobs.
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*
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* @return
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* The number of operations that successfully completed. This return value
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* must be less than or equal to the value of nb_cpls.
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*/
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__rte_experimental
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uint16_t rte_dpaa2_qdma_completed_multi(int16_t dev_id, uint16_t vchan,
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struct rte_dpaa2_qdma_job **jobs, uint16_t nb_cpls);
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#endif /* _RTE_PMD_DPAA2_QDMA_H_ */
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@ -3,6 +3,8 @@ DPDK_22 {
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};
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EXPERIMENTAL {
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rte_dpaa2_qdma_completed_multi;
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rte_dpaa2_qdma_copy_multi;
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rte_dpaa2_qdma_vchan_fd_us_enable;
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rte_dpaa2_qdma_vchan_internal_sg_enable;
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rte_dpaa2_qdma_vchan_rbp_enable;
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