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drivers/octeontx2: fix recursive interrupts

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In case of QINT interrupt occurrence, SW fails to clear the QINT
line resulting in recursive interrupts because currently interrupt
handler gets the cause of the interrupt by reading
NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT but does not write 1 to clear
RQ[SQ/CQ/ERR]_INT field in respective NIX_LF_RQ[SQ/CQ/AURA/POOL]_OP_INT
registers.

Fixes: dc47ba15f6 ("net/octeontx2: handle queue specific error interrupts")
Fixes: 50b95c3ea7 ("mempool/octeontx2: add NPA IRQ handler")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This commit is contained in:
Harman Kalra 2019-07-25 10:26:54 +00:00 committed by Thomas Monjalon
parent ef9f8bb6d5
commit 9f741506f8
2 changed files with 2 additions and 2 deletions
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2
drivers/mempool/octeontx2/otx2_mempool_irq.c
View File

@ -123,7 +123,7 @@ npa_lf_q_irq_get_and_clear(struct otx2_npa_lf *lf, uint32_t q,
qint = reg & 0xff;
wdata &= mask;
otx2_write64(wdata, lf->base + off);
otx2_write64(wdata | qint, lf->base + off);
return qint;
}

2
drivers/net/octeontx2/otx2_ethdev_irq.c
View File

@ -138,7 +138,7 @@ nix_lf_q_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t q,
qint = reg & 0xff;
wdata &= mask;
otx2_write64(wdata, dev->base + off);
otx2_write64(wdata | qint, dev->base + off);
return qint;
}